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Cxlc89109 LCD Driver Chip: High-Performance I² C Interface, Support Multi-Mode Display and Key Scan Function | JTM-IC

CXLC89109 is a memory-mapped LCD driver chip that supports two mainstream display modes: 20 × 4 dot matrix (20SEG × 4COM) and 16 × 8 dot matrix (16SEG × 8COM). The chip has a maximum of 20 × 1 or 16 × 1 matrix key scanning circuit and an I² C two-wire communication interface, greatly simplifying the connection between the main control MCU and the LCD module. Its wide operating voltage range is 2.4V ~ 5.5V, and it is manufactured by CMOS technology. It has both low power consumption and high anti-interference capability, and is suitable for all kinds of harsh industrial environments.

Cxlc89109 LCD Driver Chip: High-Performance I² C Interface, Support Multi-Mode Display and Key Scan Function | JTM-IC
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Product introduction

CXLC89109 LCD driver chip: high-performance I² C interface, support multi-mode display and key scan function

In today's intelligent and digital industrial control and consumer electronics field, liquid crystal display (LCD) module, as an important component of human-computer interaction, the performance of the driver chip directly determines the stability of the display and the energy efficiency of the system. CXLC89109 is a high-performance driver chip designed for multi-scene LCD applications. With its flexible display mode, efficient key scanning function and simple I² C communication interface, it has become an industrial instrument, ideal for digital clock, counter, voltmeter and other equipment. This paper will deeply analyze the core characteristics, electrical parameters, application circuits and instruction systems of CXLC89109 to help engineers better select and integrate the chip.XEk嘉泰姆


I. Overview of chips

CXLC89109 is a memory-mapped LCD driver chip that supports two mainstream display modes:20 × 4 dot matrix (20SEG × 4COM)And16 × 8-point array (16SEG × 8COM). Maximum built-in chip20 × 1Or16 × 1Matrix key scanning circuitI² C two-wire communication interface, greatly simplifies the connection between the main control MCU and the LCD module. Its working voltage range is as wide2.4V ~ 5.5V, manufactured by CMOS technology, it has both low power consumption and high anti-interference capability, and is suitable for all kinds of harsh industrial environments.XEk嘉泰姆


II. Features of core functions

2.1 Multi-mode display support

CXLC89109 the display mode can be flexibly switched according to system requirements:XEk嘉泰姆

 20 × 4 mode: 1/3 Bias (Bias),1/4 Duty cycle (Duty)XEk嘉泰姆

 16 × 8 mode: 1/4 bias, 1/8 duty cycleXEk嘉泰姆

Both modes are configured through internal instructions without external hardware adjustment, which greatly improves the adaptability and scalability of the system.XEk嘉泰姆

2.2. Integrated key scanning function

Maximum built-in chip20 × 1Or16 × 1Matrix keyboard scanning circuit supports hardware interrupt output (INT), which can realize real-time response of button events. Key scan input and segment output pins are reused to effectively save pin resources.XEk嘉泰姆

2.3. Low power consumption design

 The static current is as low1μA@3V(Power saving mode)XEk嘉泰姆

 Supports external clock and internal RC oscillator.XEk嘉泰姆

 Software standby mode to further reduce system power consumptionXEk嘉泰姆

2.4. Built-in display RAM

Chip Integration16 × 8-bit display data RAM, supports the automatic address increment function to facilitate the master to quickly refresh the display content.XEk嘉泰姆


III. Electrical characteristics and interface specifications

3.1. Power supply and working conditions

 Operating voltage:2.4V ~ 5.5VXEk嘉泰姆

 Operating temperature:-40 ℃ ~ 85 ℃XEk嘉泰姆

 Encapsulation:SOP28XEk嘉泰姆

3.2. I² C communication interface, data transmission time waveform

 Supports standard I² C protocol with the highest clock frequency.400kHzXEk嘉泰姆

 The slave address is fixed1110 011 R/WXEk嘉泰姆

 Supports byte write, page write, and continuous read operations.XEk嘉泰姆
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Precautions when power onXEk嘉泰姆
When the chip is powered on, the internal and reset potential of the chip will be in an unstable low voltage area for a period of time. Due to the power of VDDXEk嘉泰姆
When the pressure rises, the chip content is not completely reset, and such misoperation may occur. This prevents this from happening, additionalXEk嘉泰姆
POR circuit and software reset function are provided. In order to ensure normal internal reset of the chip, the following conditions must be met when power on.XEk嘉泰姆
In order to make POR circuit work, it is necessary to meet the recommended conditions of tR tF tOFF and Vbot.XEk嘉泰姆
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3.3. Driving capability

 COM port pull/fill current typical value180μA@5VXEk嘉泰姆

 SEG Port Drive capability is moderate, suitable for a variety of LCD panelsXEk嘉泰姆

 INT pin supports high and low levels and is compatible with different interrupt logic.XEk嘉泰姆

3.4. Input and output equivalent circuitXEk嘉泰姆
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3.5. Limit parametersXEk嘉泰姆
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(1) if the chip works for a long time under the above limit parameter conditions, the reliability of the device may be reduced or permanently damaged.XEk嘉泰姆
We recommend that you use any parameter to reach or exceed these limits.XEk嘉泰姆
(2) all voltage values are tested systematically.XEk嘉泰姆
3.6. Recommended working conditionsXEk嘉泰姆
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3.7. DC electrical characteristicsXEk嘉泰姆
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3.8. AC electrical characteristicsXEk嘉泰姆
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3.9. AC AC characteristicsXEk嘉泰姆
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IV. Typical application circuit

CXLC89109 supports a variety of practical application scenarios. The following is a brief description of several typical wiring diagrams:XEk嘉泰姆

4.1. 20*4 display mode (no INT), 20*4 display mode circuit diagram without INT

All SEG and COM pins directly drive the LCD, and the key scan input is realized through SEG0 ~ SEG19, with external **180kΩ ~ 220kΩ** pull-up resistor.XEk嘉泰姆
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4.2. 16 × 8 Display mode (with INT), 19*4 display mode circuit diagram with INT

The SEG15/K15/INT pin is configured as an interrupt output for Button event notification MCU, and the rest SEG and COM pins are used to drive the LCD.XEk嘉泰姆
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4.3. Circuit diagram of 16*8 Display mode without INTXEk嘉泰姆
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4.4.15*8 Display mode circuit diagram with INTXEk嘉泰姆
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4.5. Key scan matrix connection

In the 20 × 4 mode, K0 ~ K19 form a 20 × 1 matrix; In the 16 × 8 mode, K0 ~ K15 form a 16 × 1 matrix. All key scan inputs have internal pull-down, and the external needs only simple pull-up to achieve stable detection.XEk嘉泰姆


V. Detailed explanation of instruction system

CXLC89109 receives commands through the I² C interface to realize functions such as Mode setting, display control, and key scanning cycle adjustment:XEk嘉泰姆

5.1. System Settings command (0x 80H)

This command is used to set subsequent functions.

 Control chip enters standby or normal modeXEk嘉泰姆

 Turn LCD display on or offXEk嘉泰姆
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5.2. Mode setting command (0xa0h)

 Select Display mode (20 × 4 or 16 × 8)XEk嘉泰姆

 Configure INT pin function and effective levelXEk嘉泰姆
 INT output can be set to active low or active high.XEk嘉泰姆
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5.3. Key scan cycle setting command (0 xF8H)

You can adjusting key scan cycles based on LCD load characteristics to avoid reading errors caused by excessive RC constants.XEk嘉泰姆
5.4. System oscillatorXEk嘉泰姆
Both the internal logic and CXLC89109 LCD drive signals are timed by an internally integrated RC oscillator. After the system is initially powered on, the system oscillator is in the stopped state.XEk嘉泰姆
5.5.LCD bias generatorXEk嘉泰姆
VLCD full-scale voltage (VOP) ranges from VDD to VSS. VLCD bias voltage is three from the connection between VLCD and VSSXEk嘉泰姆
The internal bleeder of the series resistor is obtained (this VLCD has been connected to VDD inside the chip and cannot be adjusted). Resistance can be opened through differentXEk嘉泰姆
Switch off to provide 1/4 bias at 1/8 duty cycle or 1/3 bias at 1/4 duty cycle.XEk嘉泰姆
5.6. Segment driver outputXEk嘉泰姆
LCD driver part includes segment output, segment output should be directly connected to LCD display panel. In accordance with the multiplexing column signal and in the displayXEk嘉泰姆
The latched data resides to generate segment output signals. The unused segment output must remain open.XEk嘉泰姆
5.7. Shared drive outputXEk嘉泰姆
The LCD driving section includes a column output that connects it directly to the LCD panel. The shared input is generated according to the selected LCD drive mode.XEk嘉泰姆
Output signal. The output of unused columns should remain open.XEk嘉泰姆
5.8 display memory-RAM structureXEk嘉泰姆
The RAM that stores data is a static 16 × 8-bit RAM memory. Logical "1" in RAM bit mapping means "on"XEk嘉泰姆
The status of the corresponding LCD segment; The same logic 0 indicates the status of "off", and the RAM address and segment output are one-to-one correspondence, andXEk嘉泰姆
The output of each RAM byte and the column is also a one-to-one correspondence. The following table shows the mapping from RAM to LCD mode:XEk嘉泰姆
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VI. Application field recommendation

CXLC89109 is widely used in:XEk嘉泰姆

 Industrial control panel: status indication and parameter displayXEk嘉泰姆

 Intelligent instrument: voltmeter, counter, thermometerXEk嘉泰姆

 Consumer electronics: digital clock, home appliance display moduleXEk嘉泰姆

 Medical equipment: portable testing instrument reading screenXEk嘉泰姆


VII. LCD drive mode waveform

7.1 20*4 display mode, 1/4 duty , 1/3 bias

7.2. 16*8 display mode, 1/8 duty , 1/4 bias
7.3. Key scanning function
7.3.1.CXLC89109 supports 20*1 matrix key scanning in 20*4 display mode and 16*1 matrix key scanning in 16*8 display mode.XEk嘉泰姆
7.3.2. Hardware interrupt function is optional, allowing SEG19/ COM4/ K19/ INT to be used in 20*4 display mode or SEG15/ K15/ INTXEk嘉泰姆
Make an INT output or as a segment driver. Interrupt Flag can be read (polling) through the serial interface instead.XEk嘉泰姆
7.3.3. Key scan input pin is shared with segment output pin.XEk嘉泰姆
7.3.4. The key scanning cycle time continues to cycle, and all button have experienced a complete keyboard scanning to shake more than 20ms.XEk嘉泰姆
7.3.5. When the INT output is low, the INT output is valid when the "ACT" bit of the mode setting command is set to "0.XEk嘉泰姆
7.3.6. When the INT output is high, when the "ACT" bit of the mode setting command is set to "1", The INT output is valid at the high level.
7.4. Key scanning and INT timing
7.4.1. Button data is updated, and if the key is pressed for 2 cycles, INT data is changed.XEk嘉泰姆
7.4.2. When the first key is pressed, the INT function is changed and the INT FLAG bit is set to "1".XEk嘉泰姆
7.4.3. The "ACT" bit mode set command is set to "1". When Button data has been read, the button data register is cleared to "0",XEk嘉泰姆
The INT FLAG bit is set to "0" and the INT pin becomes low.XEk嘉泰姆
7.4.4. The "ACT" bit mode set command is set to "0". When Button data has been read, the button data register is cleared to "0",XEk嘉泰姆
The INT FLAG bit is set to "0" and the INT pin becomes high.XEk嘉泰姆
7.4.5. INT FLAG register is as follows. To clear the INT FLAG status, the button data register 0x20H ~ 0x22H must be in oneXEk嘉泰姆
Read in operations.
7.5.Matrix button circuitXEk嘉泰姆
CXLC89109 integrates a scanning circuit that can detect button. It has 20 inputs (K0 to K19, and SEG0 to SEG19)XEk嘉泰姆
In the display mode of 20*4 or 16 inputs (K0 to K15, sharing SEG15 with SEG0) in the display mode of 16*8. Key matrixXEk嘉泰姆
It has 20*4 display mode in 20*1 matrix or 16*8 Display mode in 16*1 matrix. The circuit connection is shown in the following figure:

8. Button data registers and commands
8.1. Button data register
When the button data register is read, the button data register is cleared to "0". Button data registers from 0X20H to 0X22HXEk嘉泰姆
The address should be read continuously and completed in one operation. Button the address of the data register corresponds to the output of button data, Button dataXEk嘉泰姆
Each byte in the register corresponds to the button data output. The mapping shown below is output from RAM data:XEk嘉泰姆
Button data registers are read-only. Button data register format is as follows:
8.2. Key scan cycle setting command
8.2.1.CXLC89109 you can use the command to set the adjusting key scan cycle. This setting is shown in the following figure.XEk嘉泰姆
8.2.2. The default value of the key scanning cycle is that the two clock cycle times are in the 20*4 display mode, and the one clock cycle time is in the 16*8 display mode.XEk嘉泰姆
8.2.3. Usually when Button data can be read correctly, users do not need to use this command.XEk嘉泰姆
8.2.4. Due to the characteristics of various liquid crystals, there will be different RC time constants during the key scanning period. If the equivalent capacitance of LCD is large,
It cannot be charged or completely discharged during the button scan, and the data cannot be read correctly. To avoid reading key errors, users canXEk嘉泰姆
Use this command to adjust the key scan cycle. If the scanning period of button is too long, it may affect the visual quality of LCD.
8.3. Button scan cycle setting

8.4. Display time and button scan period
8.5. Command/data transmission methodXEk嘉泰姆
     
The chip is made up of I2C Protocol 2-wire serial interface for data transmission
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When entering commands or displaying data, the chip must follow these steps:XEk嘉泰姆
(1) formation start conditionsXEk嘉泰姆
(2) Send Slave AddressXEk嘉泰姆
(3) command to display data transmissionXEk嘉泰姆
(4) forming stop conditions
8.6. ACK signalXEk嘉泰姆
An ACK signal is required for data transmission. The transmitted data is composed of 8 bits. ACK is returned after 8 bits of data are transmitted.XEk嘉泰姆
The signal. After 8bit Data (Slave Address,Register Address,Data) is transmitted, the number of SDA at the eighth clock failling edge of the SCLXEk嘉泰姆
According to the output "L" signal, the output stops when the 9th SCL clock drops. When the ACK signal is not required, the eighth signal from the SCL signalXEk嘉泰姆
Please enter "L" until the number drops to the 9th signal ".
8.7. Device addressingXEk嘉泰姆
The slave address byte and the following startup conditions form the first byte of the master device. The upper seven bits of the first byte indicate the slave address.XEk嘉泰姆
The eighth bit defines whether read or write operations are set. When the R/ W bit is "1", the read operation is selected, and the write operation is selected for "0.XEk嘉泰姆
CXLC89109 address bit format is as follows. When an Address byte is sent, the device matches seven bits after the first start condition. If itXEk嘉泰姆
The device outputs a response on the SDA line.
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9. Read and write operations
9.1. Byte write operations
Byte write operations require a START condition, a slave address (including R/W bits), a valid register address, numberXEk嘉泰姆
Data and STOP conditions. Each byte is transmitted, the chip replies through ACK.XEk嘉泰姆
9.2. Page write operations
9.3. Read operation
(1.) in read mode, the master device reads CXLC89109 of data after setting the slave address. Following the R/W bit (= "0") and a response bit, sendXEk嘉泰姆
The memory address (An) is written to the address pointer. The R / W bit (= "1") is written to the next start condition and the slave address again. InXEk嘉泰姆
The data in the Register starts to be transferred. The address pointer is incremented only after receiving a response clock. If the register address (An) is 0X00H ~XEk嘉泰姆
0X0FH, after reaching the storage location 0X0FH, The Pointer will be reset to 0X00H; If the register address (An) is 0X20H ~ 0X22H,XEk嘉泰姆
After the storage location is 0X22H, the pointer is reset to 0X20H.XEk嘉泰姆
(2.) read of consecutive addresses continues until the host sends a STOP condition.XEk嘉泰姆
9.4. Command summary
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9.5. Operation flow chart
9.5.1 initialization
9.5.2 display data refresh-address setting
9.5.3 button data reading

Ten, Conclusion

CXLC89109 has become the preferred driver chip for small and medium-scale LCD applications due to its high integration, low power consumption, flexible display and key scanning configurations. Its simple I² C interface and rich support of Chinese materials greatly reduce the development threshold. For more technical details, samples or purchasing support, please visitJTM-IC official website (jtm-ic.com), we provide you with original authentic products, technical guidance and one-stop supply services.XEk嘉泰姆


11. Relevant chip selection guideMore similar products.....XEk嘉泰姆

Model Number of interfaces Drive dot matrix number Segment/bit Co-negative Drive Co-positive drive Button Encapsulation form Remarks
CXLE88134N 3 28 7*4 7-segment 4-bit - - SOP16/DIP16 LED panel display driver chip
CXLE88135N 3 21 8*2/7*3 8-segment 2-bit/7-segment 3-bit - 6*1 SOP16 LED panel display driver chip
CXLE88136N 3 35 5*7/8*4 7-segment 5-bit/8-segment 4-bit 7 segments and 5 digits 5*1 SOP18/DIP18 LED panel display driver chip
CXLE88137BN 3 48 6*7/9*4 7-segment 6-bit/9-segment 4-bit 7-segment 6-bit 6*1 SOP20 LED panel display driver chip
CXLE88137N 3 48 8*6/10*4 8-segment 6-bit/10-segment 4-bit - - SOP20 LED panel display driver chip
CXLE88138C 4 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*3 SOP32 LED panel display driver chip
CXLE88138N 4 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*3 SOP32 LED panel display driver chip
CXLE88139N 3 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit - SOP24/QSOP24 LED panel display driver chip
CXLE88141N 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88142A 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88142E 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88143AN 3 128 16*8 16-segment 8-bit 8-segment 16-bit - SOP32 LED panel display driver chip
CXLE88143BN 3 112 14*8 14-segment 8-bit 8-segment 14-bit 8*2 SOP32 LED panel display driver chip
CXLE88143CN 3 120 15*8 15-segment 8-bit 8-segment 15-bit 8*1 SOP32 LED panel display driver chip
CXLE88143DN 3 96 12*8 12-segment 8-bit 8-segment 12-bit 8*4 SOP32 LED panel display driver chip
CXLE88143N 4 128 16*8 16-segment 8-bit 8-segment 16-bit 8*4 QFP44 LED panel display driver chip
CXLE88147N 3 80 10*8 10-segment 8-bit 8-segment 10-bit 8*3 SOP28 LED panel display driver chip
CXLE88148N 3 64 8*8 8-segment 8-bit 8 segments and 6 digits 4*2 SOP24/QSOP24 LED panel display driver chip
CXLE88149B 2 128 8*16 8-segment 16-bit 16-segment 8-bit - SOP28, SSOP28 LED panel display driver chip
CXLE88155N 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP24/SSOP24/SDIP24 LED panel display driver chip
CXLE88171 4 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*3 SOP32 LED panel display driver chip
CXLE88172 2 128 8*16 8-segment 16-bit 16-segment 8-bit - SOP24 LED panel display driver chip
CXLE88173 2 144 8*9*2 Positive and negative push digital tube Positive and negative push digital tube - QSOP24 LED panel display driver chip
CXLE88174 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit Touch Button 8 SOP32 LED panel display driver chip
CXLE88175 5 120 15*8 15-segment 8-bit 8-segment 15-bit 8*1/8 QFN48 LED panel display driver chip
CXLE88176 3 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*1 SOP24 LED panel display driver chip
CXLE88156 3 128 8*16 8-segment 16-bit 16-segment 8-bit - SOP32 LED panel display driver chip
CXLE88134 3 28 7*4 7-segment 4-bit - - SOP16/DIP16 LED panel display driver chip
CXLE88135 3 21 8*2/7*3 8-segment 2-bit/7-segment 3-bit - 6*1 SOP16 LED panel display driver chip
CXLE88136 3 35 5*7/8*4 7-segment 5-bit/8-segment 4-bit 7 segments and 5 digits 5*1 SOP18/DIP18 LED panel display driver chip
CXLE88137 3 48 8*6/10*4 8-segment 6-bit/10-segment 4-bit - - SOP20 LED panel display driver chip
CXLE88137A 3 48 6*7/9*4 7-segment 6-bit/9-segment 4-bit 7-segment 6-bit 6*1 SOP20 LED panel display driver chip
CXLE88138 4 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*3 SOP32 LED panel display driver chip
CXLE88139 3 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit - SOP24/QSOP24 LED panel display driver chip
CXLE88140A 4 77 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*1 SOP32 LED panel display driver chip
CXLE88140B 3 77 11*7/14*4 11 Segment 7 bit/14 Segment 4 bit 7-segment 11-bit 10*3 QFP44 LED panel display driver chip
CXLE88141 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88142 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88143 4 128 16*8 16-segment 8-bit 8-segment 16-bit 8*4 QFP44 LED panel display driver chip
CXLE88143A 3 128 16*8 16-segment 8-bit 8-segment 16-bit - SOP32 LED panel display driver chip
CXLE88143B 3 112 14*8 14-segment 8-bit 8-segment 14-bit 8*2 SOP32 LED panel display driver chip
CXLE88143C 3 120 15*8 15-segment 8-bit 8-segment 15-bit 8*1 SOP32 LED panel display driver chip
CXLE88143D 3 96 12*8 12-segment 8-bit 8-segment 12-bit 8*4 SOP32 LED panel display driver chip
CXLE88144 3 35 7*5/8*4 7-segment 5-bit/8-segment 4-bit - 7*1 DIP18 LED panel display driver chip
CXLE88145 2 32 8*4 - 8-segment 4-bit 8*2 DIP18 LED panel display driver chip
CXLE88146 2 48 8*6 - 8 segments and 6 digits 8*2 SOP20/DIP20 LED panel display driver chip
CXLE88147 3 80 10*8 10-segment 8-bit 8-segment 10-bit 8*3 SOP28 LED panel display driver chip
CXLE88148 3 64 8*8 8-segment 8-bit 8 segments and 6 digits 4*2 SOP24/QSOP24 LED panel display driver chip
CXLE88149 2 128 8*16 8-segment 16-bit 16-segment 8-bit - SOP28/SSOP28 LED panel display driver chip
CXLE88150 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88151 2 32 8*4 8-segment 4-bit/7-segment 4-bit - 7*4 SOP16/DIP16 LED panel display driver chip
CXLE88152 2 28 7*4 - 7-segment 4-bit 7*1 SOP16/DIP16 LED panel display driver chip
CXLE88153 1 40 7*6/8*5 7-segment 6-bit/8-Segment 5-bit 6-segment 7-bit/5-segment 8-bit - SOP16 LED panel display driver chip
CXLE88154 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP28 LED panel display driver chip
CXLE88155 3 70 10*7/13*4 10-segment 7-bit/13-segment 4-bit 7-segment 10-bit 10*2 SOP24/SSOP24/SDIP24 LED panel display driver chip
CXLE88133 2 256 32*8/24*16 32-segment 8-bit/24-segment 16-bit 8-segment 32-bit/16-segment 24-bit - LQFP48/LQFP52 LED panel display driver chip
CXLE88132 4 256 32*8/24*16 32-segment 8-bit/24-segment 16-bit 8-segment 32-bit/16-segment 24-bit - LQFP48/LQFP52 LED panel display drive core