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CXLC8964B LCD driver deep analysis: 256-point driver, buzzer and watchdog integrated design0Np嘉泰姆

In today's embedded display system, the demand for high resolution, multi-function integration and low power consumption is increasingly prominent. CXLC8964B as a 256-point memory image type driver chip specially designed for large-size LCD panel, it not only provides excellent display drive capability, but also integrates buzzer Drive, watchdog timer and time base generator, it provides a complete display solution for industrial control, medical equipment and high-end consumer electronics. This article will comprehensively analyze the technical characteristics, system architecture and application design guidelines of CXLC8964B.0Np嘉泰姆

I. CXLC8964B core features and product advantages

CXLC8964B is a high-performance LCD driver chip, built-in 32 × 8-bit display RAM, directly supports 256-point display output. Its operating voltage range is 2.4V to 5.2V, which is compatible with a wide range of embedded system applications. The chip has a built-in 32kHz RC oscillator, supports external clock input, has 1/4 bias voltage and 1/8 duty cycle configuration, and is suitable for a variety of complex LCD panels.0Np嘉泰姆

Main Technical Highlights:0Np嘉泰姆

•  Large Capacity display driver: supports 256-point (32 × 8)LCD display;0Np嘉泰姆

•  Integrated buzzer driver: provide 2kHz/4kHz optional differential output;0Np嘉泰姆

•  Watchdog and time base functions: Enhance system reliability and timing control;0Np嘉泰姆

•  Four-wire serial interface: simplifies main controller connections;0Np嘉泰姆

•  Multi-encapsulation options: provides LQFP44, LQFP52, and LQFP64 packages;0Np嘉泰姆

•  Ultra-low power consumption: The minimum standby current is only 1μa (3v condition).0Np嘉泰姆

II. Pin connections and electrical characteristics

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CXLC8964B provides three types of encapsulation. For example, the main pins of LQFP64 include:0Np嘉泰姆

2.2. Highlights of electrical parameters:0Np嘉泰姆

•  Work current: 100 μA at 3V and 150 μA at 5V (typical value);0Np嘉泰姆

•  Driving capability: the output current of the segment reaches 430 μA, and the common terminal reaches 460 μA;0Np嘉泰姆

•  Communication Rate: supports up to 300kHz serial clock;0Np嘉泰姆

•  Sound Output: 2kHz/4kHz adjustable, driving capacity up to 4.5mA.0Np嘉泰姆

2.2.1 Input and output equivalent circuit0Np嘉泰姆
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2.2.2 limit parameters0Np嘉泰姆
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(1) if the chip works for a long time under the above limit parameter conditions, the reliability of the device may be reduced or permanently damaged. It is not recommended to implement it.0Np嘉泰姆
Any parameter reaches or exceeds these limit values during international use.0Np嘉泰姆
(2) all voltage values are tested systematically.0Np嘉泰姆
2.2.3 recommended working conditions0Np嘉泰姆
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2.2.4 AC electrical characteristics0Np嘉泰姆
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2.2.5 DC electrical characteristics0Np嘉泰姆
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III. System architecture and memory mapping

CXLC8964B adopts an efficient 32 × 8-bit static RAM architecture, and data is directly mapped to LCD segment output. The RAM address is 6 bits (A0 to A5) and supports three access modes:0Np嘉泰姆

•  READ mode(Code 110): Read display data;0Np嘉泰姆
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•  WRITE mode(Code 101): write display data;0Np嘉泰姆
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•  READ-MODIFY-WRITE mode(Code 101): Read before write, applicable to bit operations.0Np嘉泰姆
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The system clock can select an on-chip 32kHz RC oscillator or an external 32kHz clock source. The LCD drive clock (typically 64Hz) and the time base/WDT clock are generated by frequency division.0Np嘉泰姆
3.1. Display memory (RAM)0Np嘉泰姆
The static display memory contains a 32 × 8-bit format to store the data to be displayed. The RAM data is directly mapped to the LCD display driver,0Np嘉泰姆
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You can also READ and WRITE through the READ,WRITE, and READ-MODIFY-WRITE commands. The following figure shows the RAM image.0Np嘉泰姆

IV. Buzzer drive function

CXLC8964B integrates buzzer drive circuit, which can output differential signals on BZ and BZ pins:0Np嘉泰姆

•  TONE 2K command: output 2kHz drive signal;0Np嘉泰姆

•  TONE 4K command: output 4kHz drive signal;0Np嘉泰姆

•  TONE OFF Command: turn off sound output.0Np嘉泰姆

This function greatly simplifies the complexity of the audio prompt part in the system design without external audio driver circuit.0Np嘉泰姆

V. Time Base and watchdog timer

The CXLC8964B time base generator and watchdog timer share a frequency division circuit, providing complete system monitoring functions:0Np嘉泰姆

5.1. Time base generator:0Np嘉泰姆

•  Supports 8 programmable output frequencies from 1Hz to 128Hz;0Np嘉泰姆

•  You can use the IRQ pin to output scheduled interrupts.0Np嘉泰姆

5.2. Watchdog timer:0Np嘉泰姆

•  The timeout period can be adjusted from 4 seconds to 1/16 seconds;0Np嘉泰姆

•  When overflow occurs, IRQ outputs a low level until the CLR WDT command is executed;0Np嘉泰姆

•  Enhance the anti-interference ability of the system.0Np嘉泰姆

The time base generator and the watchdog output (WDT) share the same (÷ 256) frequency division circuit, TIMER EN/DIS/CLR,0Np嘉泰姆
WDT EN/DIS/CLR acts on the time base generator and watchdog circuit respectively. The following figure shows the schematic diagram.0Np嘉泰姆
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After WDT is enabled, once WDT times out, IRQ will be lowered and kept low until CLR WDT is executed or IRQ DIS is executed.0Np嘉泰姆
The output is turned off only after the command. At this time, the IRQ output is in the high resistance state, which is forcibly pulled to the high level state by the external pull-up resistor.0Np嘉泰姆
If you select an external clock as the system frequency source, the SYS DIS command is invalid and the system cannot enter the power saving mode. CXLC8964B power off0Np嘉泰姆
Or keep working until the external clock is canceled.0Np嘉泰姆

5.3. Configure commands:0Np嘉泰姆

•  TIMER EN/DIS: enable/disable time base output;0Np嘉泰姆

•  WDT EN/DIS: watchdog function control;0Np嘉泰姆

•  CLR TIMER/CLR WDT: clears the counter status.0Np嘉泰姆

5.4. Buzzer drive output0Np嘉泰姆
CXLC8964B built-in a simple sound generator that can output a pair of differential drive signals at BZ and BZ feet for driving buzzer0Np嘉泰姆
Generates a single tone. After executing the command tone2 K and tonek K, two different sounds can be generated by driving the buzzer at the frequency of 2kHz and 4kHz.0Np嘉泰姆
Sound; The TONEOFF command can be used to turn off sound output. When the system fails or the TONGOFF command is executed, BZ and BZ remain low.0Np嘉泰姆
Flat output status.0Np嘉泰姆

VI. Command system and communication protocol

CXLC8964B supports flexible command configuration systems:0Np嘉泰姆

6.1. Operation mode:0Np嘉泰姆

•  Command mode (code 100): System configuration;0Np嘉泰姆

•  Data mode (code 101/110): Data Display Control.0Np嘉泰姆

6.2. Main configuration commands:0Np嘉泰姆

•  LCD ON/OFF: Display switch control;0Np嘉泰姆

•  SYS EN/DIS: system clock management;0Np嘉泰姆

•  RC 32K/EXT 32K: clock source selection;0Np嘉泰姆

•  IRQ EN/DIS: interrupt output control.0Np嘉泰姆

6.3. Key points of communication protocol:0Np嘉泰姆

•  Four-wire interface supports full duplex communication;0Np嘉泰姆

•  During continuous command transmission, only the first command must contain the pattern code;0Np嘉泰姆

•  CS high pulse is used for interface reset.0Np嘉泰姆

CXLC8964B only four pins are used for communication with MCU, while pin CS is used for initializing serial interface circuit and ending instruction data transmission.0Np嘉泰姆
When CS sets "1", CXLC8964B does not accept any commands and data sent by MCU and initializes the serial interface. In different operation type codes0Np嘉泰姆
CS must initialize the serial interface of CXLC8964B with a high level. Otherwise, the transmitted commands or data will fail. PIN DATA is a string0Np嘉泰姆
The input/output pins of row DATA. Read/write DATA can be completed through the cooperation between DATA and RD and WR. Pin RD is the input pin of the memory clock,0Np嘉泰姆
At failling edge of the RD signal, the DATA in the video memory will be output to the chip DATA register, on the rising edge of RD and the next failling edge0Np嘉泰姆
Between, the DATA in the DATA register will be read to the DATA foot. Pin WR is the write clock input, on the top edge of the WR signal, PIN DATA0Np嘉泰姆
The data, address, and command are written to CXLC8964B. Optional pin IRQ, which can be used as the communication interface between MCU and CXLC8964B. IRQ can0Np嘉泰姆
The output of the time base timer or WDT overflow flag bit is set by software. After the MCU is connected to the IRQ of CXLC8964B, it can be realized.0Np嘉泰姆
Application of time base or WDT function. Since IRQ is an Nmos open-drain output, 10K pull-up resistor must be added during use. If you do not need to use0Np嘉泰姆
IRQ can float empty with time base or WDT function.0Np嘉泰姆

6.4. Command mode0Np嘉泰姆
CXLC8964B can be configured by software. Commands in the two modes can be configured with CXLC8964B and read/write video memory data, and CXLC8964B0Np嘉泰姆
The formula is called command mode, and the operation mode of chip memory is called data mode. The following table shows the type code table of data and command mode:0Np嘉泰姆

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Mode commands should be sent before data or commands are transmitted. If you want to send consecutive commands, only one command mode type code 100 can be sent.0Np嘉泰姆
Next, the following commands follow the command code of different commands. In the discontinuous command mode or the discontinuous address data mode, one is sent at a time.0Np嘉泰姆
After a command or a data instruction, CS should first set "1" to ensure that the current operation mode is reset. After the CS pin is set to "0", it should be sent first.0Np嘉泰姆
The new operation mode type code.0Np嘉泰姆
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6.5. Data and command modes0Np嘉泰姆
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Note: MCU should read DATA between the rising edge of RD and the next failling edge, and the waveform of RD and WR cannot cross,0Np嘉泰姆
That is, only RD or WR operations are allowed at the same time.0Np嘉泰姆
6.6.Command overview table0Np嘉泰姆
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Note:0Np嘉泰姆
1:X does not care. We recommend that you write "0". 2:A5 ~ A0 memory address. 3:D0 to D4 Video memory data. 4:D/C data/command mode.0Np嘉泰姆
5: default after power-on reset: default status of the chip after power-on reset0Np嘉泰姆
All bold numbers: 110,101,100 is the mode command type code. 100 is the command mode type code. If it is sent to CXLC8964B0Np嘉泰姆
For consecutive commands, except for the first command, other commands cannot send another 100 type code. Sound frequency source and time base/WDT clock frequency source by chip0Np嘉泰姆
The internal 32kHz RC oscillator or the external 32kHz frequency source is provided. For more information about the output frequency calculation, see the time base and gatekeeper in the previous system description section.0Np嘉泰姆
The dog output (WDT) and the output frequency setting instructions F0 to F128 on the time base/WDT frequency in the above table. We recommend that you use MCU to initialize after power-on reset.0Np嘉泰姆
CXLC8964B, because if the power-on reset fails, CXLC8964B will not work properly.0Np嘉泰姆
TEST instruction (100 1110-0000-X), the user shall not send to the chip during normal use, otherwise the chip will enter the TEST mode,0Np嘉泰姆
However, other commands and data sent by MCU cannot be executed normally.0Np嘉泰姆

VII. Application scenarios and Design Guidelines

7.1.CXLC8964B is applicable to the following high-end application scenarios:0Np嘉泰姆

•  Industrial control equipment: HMI interface and process control display;0Np嘉泰姆

•  Medical Instrument: monitoring equipment and diagnostic instrument display;0Np嘉泰姆

•  Smart Home: central control panel, security system;0Np嘉泰姆

•  Office equipment: the status of the copier and printer is displayed.0Np嘉泰姆

7.2. Key design attention:0Np嘉泰姆

7.2.1)VLCD voltage must be ≤ VDD, typical VLCD = 4v VDD = 5V;0Np嘉泰姆

7.2.2)Use 15kohm ± 20% resistor to adjust LCD contrast;0Np嘉泰姆

7.2.3)IRQ output requires external 10 kOhm pull-up resistor;0Np嘉泰姆

7.2.4)When using an internal RC oscillator, ossci pins must float empty;0Np嘉泰姆

7.2.5)Decoupling capacitors must be placed nearby between VDD-GND;0Np嘉泰姆

7.2.6)The complete initialization sequence must be performed after power-on.0Np嘉泰姆

7.3. Application Information0Np嘉泰姆
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Description:0Np嘉泰姆
1. The diagram shown in the preceding figure takes the LQFP64 packaged chip as an example.0Np嘉泰姆
2. The voltage of VLCD must be less than or equal to the voltage of VDD.0Np嘉泰姆
3. The pull-up adjustable resistor of VLCD is used to adjust the control voltage of LCD. When VDD = 5.0V and Vlcd = 4.0V, VR = 15k±20%.0Np嘉泰姆
4. If you do not need to read CXLC8964B of the video memory data, RD can not be connected to the MCU.0Np嘉泰姆
5. The capacitance of VDD to GND can filter out the ripple generated on the chip VDD, so this capacitance cannot be saved, and when PCB fabric swatch, try to connect it0Np嘉泰姆
Near chip.0Np嘉泰姆
6. Chip clock can choose on-chip RC and external clock. If internal RC oscillation is used, ossci foot must remain floating, * 32kHz clock0Np嘉泰姆
Must be evacuated, otherwise the chip may not work properly.0Np嘉泰姆
7. After the LCD display is turned on at CXLC8964B, the COM port circularly outputs step waves. This feature enables CXLC8964B to drive 2COM,4COM, and 8COM.0Np嘉泰姆
LCD.0Np嘉泰姆
8. If the time base/WDT function is not used, the connection between IRQ and MCU can not be connected. Since IRQ is Nmos open-drain output, if used0Np嘉泰姆
Base/WDT function, IRQ must be connected with a 10K pull-up resistor, otherwise IRQ will not be able to output high level.0Np嘉泰姆

8. Packaging options and mechanical characteristics

CXLC8964B provides three packaging options to meet different layout requirements:0Np嘉泰姆

•  LQFP44: 10mm × 10mm, suitable for compact design;0Np嘉泰姆

•  LQFP52: 14mm × 14mm, balanced size and number of pins;0Np嘉泰姆

•  LQFP64: 7mm × 7mm/14mm × 14mm, providing up to IO.0Np嘉泰姆

All packages meet industrial temperature standards (-40℃ to 85℃) and have excellent welding reliability and heat dissipation performance.0Np嘉泰姆

IX. Conclusion

CXLC8964B is an ideal choice for large LCD Display Systems with its 256-point drive capability, integrated buzzer Drive, complete watchdog timer and flexible four-wire interface. Whether it is industrial control, medical equipment or high-end consumer electronics, its high integration and stable performance can significantly enhance the competitiveness of products.0Np嘉泰姆

For CXLC8964B samples, detailed technical documents, or professional design support, please visitJTM-IC official website, our technical team will provide you with complete product solutions and professional technical services.0Np嘉泰姆

Ten,Relevant chip selection guideMore similar products.....0Np嘉泰姆

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