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首页 > Products > Power Management > DC/DC Step-Down Converter > Buck Step-Down Converter >Complete DDR, DDRII and DDRIII Memory Solution Synchronous Buck PWM Controller, 3A LDO, Buffered Reference CXSD62361/A The PWM controller uses constant on-time control scheme to handle wide input/outp
Complete DDR, DDRII and DDRIII Memory Solution Synchronous Buck PWM Controller, 3A LDO, Buffered Reference CXSD62361/A The PWM controller uses constant on-time control scheme to handle wide input/outp

The CXSD62361/A is intended for DDR/SSTL-2, DDRII/SSTL-18 and DDRIII memory systems. It integrates a synchronous buck PWM controller with a 3-A sink-source linear regulator and buffered reference. The PWM controller uses constant on-time control scheme to handle wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The CXSD62361/A achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronous rectifier MOSFETs. Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. The 3A sink/source tracking termination regulator is specifically designed for low-cost/ low-external component count systems. The regulator contains a high speed operational amplifier that provides fast load transient response with only 20μF (2x10μF) of ceramic output capacitance. The CXSD62361/A supports remote sensing functions and all features required to power the DDR /DDRII /DDRIII VTT bus termination according to the JEDEC specification

Complete DDR, DDRII and DDRIII Memory Solution Synchronous Buck PWM Controller, 3A LDO, Buffered Reference CXSD62361/A The PWM controller uses constant on-time control scheme to handle wide input/outp
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1.产品概述       2.产品特点     x0j嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)x0j嘉泰姆

5.产品封装       6.电路原理图  x0j嘉泰姆

7.相关产品x0j嘉泰姆

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and VTTREF in S5 (Shutdown). The CXSD62361/A provides OVP, UVP, over The CXSD62361/A is intended for DDR/SSTL-2, DDRII/SSTL-18 and DDRIII memory systems. It integrates a synchronous buck PWM controller with a 3-A sink-source linear regulator and buffered reference. The PWM controller uses constant on-time control scheme to handle wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The CXSD62361/A achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronous rectifier MOSFETs. Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. The 3A sink/source tracking termination regulator is specifically designed for low-cost/ low-external component count systems. The regulator contains a high speed operational amplifier that provides fast load transient response with only 20μF (2x10μF) of ceramic output capacitance. The CXSD62361/A supports remote sensing functions and all features required to power the DDR /DDRII /DDRIII VTT bus termination according to the JEDEC specification. In addition, the CXSD62361/A includes integrated sleep-state controls placing VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT current and thermal shutdown protection functions and is available in a 20-pin 3X3 TQFN package and 24-pin 4X4 TQFN includes over voltage protection.

   产品特点 返回TOPx0j嘉泰姆


•Synchronous Buck Controller (VDDQ) x0j嘉泰姆

„ Ultra-High Efficiency x0j嘉泰姆

„ No Current-Sense Resistor (Lossless ILIMIT) x0j嘉泰姆

„ Quasi-PWM with 100ns Load-Step Response x0j嘉泰姆

„ 1.8V(DDRII) /1.5V(DDRIII) Fixed or Adjustable to 2.5V(DDR) or 0.75V to 3.6V Adjustable Output Range x0j嘉泰姆

„ 2V to 24V Battery Input Range x0j嘉泰姆

„ 400kHz Switching Frequency x0j嘉泰姆

„ OVP & UVP of VDDQ Output x0j嘉泰姆

„ Drives Large Synchronous-Rectifier FETs x0j嘉泰姆

„ Power-Good Indicator x0j嘉泰姆

•3-A LDO (VTT), Buffered Reference (VTTREF) x0j嘉泰姆

„ Support DDR (1.25 VTT) , DDR II (0.9 VTT) and DDRIII(0.75 VTT) Requirements x0j嘉泰姆

„ VLDOIN Voltage Range: 1.2V to 3.6V x0j嘉泰姆

„ Requires Only 20μF Ceramic VTT Output Capacitance x0j嘉泰姆

„ Supports High-Z in S3 and Soft-Off in S5 x0j嘉泰姆

„ Integrated Divider Tracks 1/2 VDDQSNS for Both VTT and VTTREF „ Remote Sensing (VTTSNS) x0j嘉泰姆

„ ±20mV Accuracy for VTT and VTTREF x0j嘉泰姆

„ 10mA Buffered Reference (VTTREF) x0j嘉泰姆

„ Built-In Soft-Start to Reduce the VLDOIN Surging Current x0j嘉泰姆

„ Over Current Protection of VTT Output x0j嘉泰姆

„ Thermal Shutdown Protectionx0j嘉泰姆

   应用范围 返回TOPx0j嘉泰姆


„ Notebook Computers x0j嘉泰姆

„ CPU Core Supply x0j嘉泰姆

„ Chipset/RAM Supply as Low as 0.75V x0j嘉泰姆

„ 1.8V and 2.5V I/O Supplyx0j嘉泰姆

   技术规格书(产品PDF) 返回TOP x0j嘉泰姆


     需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持x0j嘉泰姆

 QQ截图20160419174301.jpgx0j嘉泰姆

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电路原理图 返回TOPx0j嘉泰姆

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Synchronous (Quasi-PWM) Step Down Controllerx0j嘉泰姆

Part   NO.x0j嘉泰姆

Vin(V)x0j嘉泰姆

min.x0j嘉泰姆

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max.x0j嘉泰姆

VOUTx0j嘉泰姆

(V)x0j嘉泰姆

FSWx0j嘉泰姆

(k Hz)x0j嘉泰姆

FBx0j嘉泰姆

(V)x0j嘉泰姆

Notex0j嘉泰姆

Packagex0j嘉泰姆

CXSD62355x0j嘉泰姆

3x0j嘉泰姆

28x0j嘉泰姆

0.7~1.8x0j嘉泰姆

300/400x0j嘉泰姆

0.8x0j嘉泰姆

EN, SS, PGOOD,   OVP, UVP, OCP, VTTREF, Built-in BST diode, DDR1/2/3/3L, 2A LDO for VTTx0j嘉泰姆

TQFN3X3-20x0j嘉泰姆

CXSD62356x0j嘉泰姆

4.5x0j嘉泰姆

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0.7~2.6x0j嘉泰姆

ADJx0j嘉泰姆

0.7x0j嘉泰姆

EN,   PGOOD, OVP, UVP, OCP, VOUT Adjustable,1.5ms VOUT Servo Soft Start, 4700ppm/°C   RON Coefficient x0j嘉泰姆

TDFN3X3-10x0j嘉泰姆

CXSD62357x0j嘉泰姆

4.5x0j嘉泰姆

28x0j嘉泰姆

0.5~3.3x0j嘉泰姆

ADJx0j嘉泰姆

0.5x0j嘉泰姆

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TQFN2X2-12x0j嘉泰姆

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0.75x0j嘉泰姆

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0.75~3.6x0j嘉泰姆

400/ADJx0j嘉泰姆

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EN,   SS, PGOOD, OVP, UVP, OCP, VTTREF, Built-in BST diode, DDR1/2/3/3L, 3A/2A   LDO for VTTx0j嘉泰姆

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