• [ CX8P59 ]"

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                          目录K8E嘉泰姆

   1.产品概述      2.产品特点      3.应用范围     4.技术规格书下载（PDF文档）K8E嘉泰姆

   5.产品封装      6.电路原理图     7.相关产品K8E嘉泰姆

一.产品概述K8E嘉泰姆

  The CX8P59 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 47 instructions. All instructions are single cycle except  for program branches which take two cycles. The easy to use and easy to remember instruction set reduces development time significantly.K8E嘉泰姆

      The CX8P59 series consists of Power-on Reset (POR), Brown-out Reset (BOR), Power-up Reset Timer (PWRT),Oscillator Start-up Timer(OST), Watchdog Timer, EPROM/ROM, SRAM, tri-state I/O port, I/O pull-high/open-drain/pull-down control, Power saving SLEEP mode, real time programmable clock/counter,Interrupt, Wake-up from SLEEP mode, and Code  Protection for EPROM products. There are four oscillator configurations to choose from, including the power-saving LP (Low Power) oscillator and cost saving RC oscillator. The CX8P59 series address 4K×13 of program memory.K8E嘉泰姆

       The CX8P59 series can directly or indirectly address its register files and data memory. All special functionK8E嘉泰姆

registers including the program counter are mapped in the data memory.  K8E嘉泰姆

二.产品特点K8E嘉泰姆

‧ Only 47 single word instructionsK8E嘉泰姆

‧ All instructions are single cycle except for program branches which are two-cycleK8E嘉泰姆

‧ 13-bit wide instructionsK8E嘉泰姆

‧ All ROM/EPROM area GOTO/FGOTO instructionK8E嘉泰姆

‧ All ROM/EPROM area subroutine CALL/FCALL instructionK8E嘉泰姆

‧ 8-bit wide data pathK8E嘉泰姆

‧ 5-level deep hardware stackK8E嘉泰姆

‧ 4K x 13 bits on chip EPROM/ROMK8E嘉泰姆

‧ 144 x 8 bits on chip general purpose registers (SRAM)K8E嘉泰姆

‧ Operating speed: DC-20 MHz clock inputK8E嘉泰姆

             DC-100 ns instruction cycleK8E嘉泰姆

‧ Direct, indirect addressing modes for data accessingK8E嘉泰姆

‧ 8-bit real time clock/counter (Timer0) with 8-bit programmable prescalerK8E嘉泰姆

‧ Internal Power-on Reset (POR)K8E嘉泰姆

‧ Built-in Low Voltage Detector (LVD) for Brown-out Reset (BOR)K8E嘉泰姆

‧ Power-up Reset Timer (PWRT) and Oscillator Start-up Timer(OST)K8E嘉泰姆

‧ On chip Watchdog Timer (WDT) with internal oscillator for reliable operation and soft-ware          watch-dog   enable/disable controlK8E嘉泰姆

‧ Three I/O ports IOA, IOB and IOC with independent direction controlK8E嘉泰姆

‧ 16 soft-ware control pull-high pins: Port B/Port CK8E嘉泰姆

‧ 8 soft-ware control pull-down pins:IOA0~A3/IOB0~B3K8E嘉泰姆

‧ 2 soft-ware control open-drain pins: IOC6/IOC7K8E嘉泰姆

‧ One internal interrupt source: Timer0 overflow; Two external interrupt source: K8E嘉泰姆

       INT0 pin, INT1 pinK8E嘉泰姆

‧ Wake-up from SLEEP by Port B/IOC4/IOC5 input fallingK8E嘉泰姆

‧ Power saving SLEEP modeK8E嘉泰姆

‧ Programmable Code ProtectionK8E嘉泰姆

‧ Selectable oscillator options:K8E嘉泰姆

          - ERC: External Resistor/Capacitor OscillatorK8E嘉泰姆

           - XT: Crystal/Resonator OscillatorK8E嘉泰姆

           - HF: High Frequency Crystal/Resonator OscillatorK8E嘉泰姆

           - LF: Low Frequency Crystal OscillatorK8E嘉泰姆

‧ Wide-operating voltage range:K8E嘉泰姆

- EPROM : 2.3V to 5.5VK8E嘉泰姆

- ROM : 2.3V to 5.5VK8E嘉泰姆

三.应用范围K8E嘉泰姆

‧ CX8P59AE : 28-pin EPROM deviceK8E嘉泰姆

‧ CX8P59BE : 32-pin EPROM deviceK8E嘉泰姆

‧ CX8P59A : 28-pin Mask ROM deviceK8E嘉泰姆

‧ CX8P59B : 32-pin Mask ROM device  K8E嘉泰姆

四.技术规格书（产品PDF)K8E嘉泰姆

需要详细的PDF规格书请扫一扫微信联系我们，还可以获得免费样品以及技术支持！K8E嘉泰姆

 K8E嘉泰姆

五.产品封装图K8E嘉泰姆

  K8E嘉泰姆

六.电路原理图K8E嘉泰姆

   K8E嘉泰姆

七.相关芯片选择指南       更多同类产品......K8E嘉泰姆

◀ Previous:GENERAL DESCRIPTION TheCX8P51 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers. It employs a RISC architecture with only 47 instructions.

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