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首页 > Products > MCU Memory ADC Clock  > EEPROM Memory > EEPROM Memory >DDR Termination Regulator CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV–SDRAM systems It provides accurate
DDR Termination Regulator CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV–SDRAM systems It provides accurate

The CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV –SDRAM systems. It provides accurate and fast response with up to 1.8A source/sink ability in load transient to track reference voltage. The terminated voltage can be generated by two external resistors or programmed by forcing VREF pin at a desired voltage.

DDR Termination Regulator CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV–SDRAM systems It provides accurate
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1.产品概述       2.产品特点     arN嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)arN嘉泰姆

5.产品封装       6.电路原理图  arN嘉泰姆

7.相关产品arN嘉泰姆

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The CXEP3474 is a linear regulator designed to meet the JEDEC SSTL (Series Stub Termination Logic) specifications in DDRI/II/III/IIIL/IV –SDRAM systems. It provides accurate and fast response with up to 1.8A source/sink ability in load transient to track reference voltage. The terminated voltage can be generated by two external resistors or programmed by forcing VREF pin at a desired voltage. Also the CXEP3474 operate in low power consumption as low as 0.7mA and it has a shutdown function by setting VREF lower than 0.15V then the VTT is turned off and discharged via an internal MOSFET. This function obtains low quiescent current as 50μA for STR mode.

   产品特点 返回TOParN嘉泰姆


„ Support DDR I (1.25 VTT), DDR II (0.9 VTT), DDR III (0.75 VTT), DDR IIIL (0.675VTT) and DDR IV (0.6 VTT) RequirementsarN嘉泰姆

„ VCNTL Supply Voltage: 3V to 5.5V arN嘉泰姆

„ Termination Supply Voltage : 1.2V to 3.6V arN嘉泰姆

„ Stable with Output Ceramic Capacitor arN嘉泰姆

„ Over Current Protection arN嘉泰姆

„ Thermal Shutdown Protection arN嘉泰姆

„ Shutdown Function for STR (S3) Mode arN嘉泰姆

„ Adjustable Output Voltage with Resistors arN嘉泰姆

„ Built-In Soft-Start arN嘉泰姆

„ Power MOS integrated arN嘉泰姆

„ SOP-8 (FD) and MSOP-8 (FD) Package arN嘉泰姆

„ RoHS CompliantarN嘉泰姆

   应用范围 返回TOParN嘉泰姆


„ DDR I/II/III/IIIL/IV Memory Termination arN嘉泰姆

„ SSTL_3, SSTL_2, SSTL_18, SSTL_15 arN嘉泰姆

„ Notebook/Desktop/Server arN嘉泰姆

„ Telecom/Datacom, GSM Base Station, LCD-TV/PDP-TV, Copier/Printer, Set-Top BoxarN嘉泰姆

   技术规格书(产品PDF) 返回TOP arN嘉泰姆


     需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持!arN嘉泰姆

 QQ截图20160419174301.jpgarN嘉泰姆

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电路原理图 返回TOParN嘉泰姆


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DDR TerminatorarN嘉泰姆

Part   NO.arN嘉泰姆

VDDQarN嘉泰姆

(V)minarN嘉泰姆

VDDQarN嘉泰姆

(V)maxarN嘉泰姆

VCNTLarN嘉泰姆

(V)arN嘉泰姆

IsourcearN嘉泰姆

(A)arN嘉泰姆

IsinkarN嘉泰姆

(A)arN嘉泰姆

IVREFarN嘉泰姆

(mA)arN嘉泰姆

IsupplyarN嘉泰姆

(μA)arN嘉泰姆

NotearN嘉泰姆

PackagearN嘉泰姆

CXEP3473arN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3.3~5.5arN嘉泰姆

3arN嘉泰姆

3arN嘉泰姆

10arN嘉泰姆

750arN嘉泰姆

DDR3/3L,LPDDR2/3arN嘉泰姆

TDFN2X2-10arN嘉泰姆

CXEP3474arN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3~5.5arN嘉泰姆

1.8arN嘉泰姆

1.8arN嘉泰姆

--arN嘉泰姆

700arN嘉泰姆

DDR1/2/3/3LarN嘉泰姆

SOP8(FD)/MSOP-8(FD)arN嘉泰姆

CXEP3475arN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3.3~5.5arN嘉泰姆

3arN嘉泰姆

3arN嘉泰姆

--arN嘉泰姆

750arN嘉泰姆

DDR1/2/3/3LarN嘉泰姆

SOP8(FD)arN嘉泰姆

CXEP3475BarN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3~5.5arN嘉泰姆

2arN嘉泰姆

2arN嘉泰姆

--arN嘉泰姆

1300arN嘉泰姆

DDR1/2/3arN嘉泰姆

SOT23-5/SOP8/ MSOP8(FD)arN嘉泰姆

CXEP3476/7arN嘉泰姆

1.6arN嘉泰姆

5.5arN嘉泰姆

1.6~5.5arN嘉泰姆

1.5arN嘉泰姆

1.5arN嘉泰姆

0.03arN嘉泰姆

280arN嘉泰姆

DDR1/2arN嘉泰姆

SOP8(FD)arN嘉泰姆

CXEP3478/BarN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3~5.5arN嘉泰姆

4~3arN嘉泰姆

4~3arN嘉泰姆

10arN嘉泰姆

800arN嘉泰姆

DDR1/2/3/3LarN嘉泰姆

MSOP10(FD)/MSOP8(FD)arN嘉泰姆

CXEP3479arN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3~5.5arN嘉泰姆

4~3arN嘉泰姆

4~3arN嘉泰姆

10arN嘉泰姆

900arN嘉泰姆

DDR1/2/3/3LarN嘉泰姆

MSOP8/SOP8(FD)arN嘉泰姆

CXEP3480arN嘉泰姆

1.2arN嘉泰姆

3.6arN嘉泰姆

3~5.5arN嘉泰姆

4arN嘉泰姆

4arN嘉泰姆

10arN嘉泰姆

900arN嘉泰姆

DDR1/2/3arN嘉泰姆

SOP8(FD)arN嘉泰姆