• [ CXLE87194 ]"

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          In LED display and lighting systems, the performance of the driver chip directly determines the brightness, color consistency, and stability of the entire system. JTM-IC has launchedCXLE87194, is a three channel constant current driver chip designed specifically for high brightness LEDs, widely used in point light sources, guardrail tubes, soft light strips, indoor and outdoor large screens, and other scenarios. With its excellent performance and reliability, it has become one of the preferred LED driver solutions.ogu嘉泰姆

1、 Product Overview

        CXLE87194 is a highly integrated three channel LED driver chip that integrates MCU single wire digital interface, data latch, LED constant current driver, PWM brightness control, and gamma correction circuit. This chip supports dual channel input-output cascade interfaces, and external controllers can achieve multi chip cascade control with only a single wire. Its unique backup communication port design ensures that even if a chip is damaged in the cascade link, it will not affect the normal operation of subsequent chips, greatly improving the reliability and maintenance convenience of the system.ogu嘉泰姆

2、 Main characteristics

•    Working voltage range：4.0V ~ 5.5Vogu嘉泰姆

•    Fixed output current：12mAogu嘉泰姆

•    RGB brightness levelLevel 65536 (supports GAMA correction)ogu嘉泰姆

•    Current output accuracy：ogu嘉泰姆

•    Channel error:± 3%ogu嘉泰姆

•    Inter chip error:± 5%ogu嘉泰姆

•    Data transmission rate：1.2MHzogu嘉泰姆

•    package formIntegrated wick packaging, suitable for compact designogu嘉泰姆

•    Applicable fields: Point light source, guardrail tube, soft light strip, indoor and outdoor large screen, etcogu嘉泰姆

3、 Analysis of Technical Highlights

1. High precision constant current output

CXLE87194 adopts advanced constant current control technology to ensure that the output current of each channel is highly consistent. Even in the case of load voltage fluctuations, the output current remains stable, effectively avoiding LED brightness unevenness or color cast problems caused by current fluctuations.ogu嘉泰姆

2. Dual channel cascading and redundancy design

The chip supports dual input of DIN and FDIN, and has automatic data shaping and forwarding functions. When a certain chip fails, the backup port can ensure that subsequent chips receive data normally, avoiding“ One broken, all destroyed; The problem.ogu嘉泰姆

3. Flexible PWM dimming and gamma correction

Each RGB channel supports 8-bit PWM dimming (256 levels), combined with built-in gamma correction function, which can achieve smooth brightness transition and true color reproduction, suitable for high demand visual display scenes.ogu嘉泰姆

4. High speed data transmission and automatic synchronization

The chip is equipped with an oscillation circuit that supports a maximum data transmission rate of 1.2MHz and can automatically synchronize the clock. The data will not attenuate or distort during the cascading process, making it suitable for long-distance, multi node LED control systems.ogu嘉泰姆

4、 Typical Application Circuit

        In practical applications, it is recommended to connect 100Ω in series with DIN, FDIN, and DO ports; Resistors are used to protect against transient high voltage impacts during the insertion and removal process. Each chip should have a parallel connection of 104 capacitors between VDD and GND, and the wiring should be shortened as much as possible to ensure power stability and anti-interference ability.ogu嘉泰姆

4.1.    Cascade schematic diagram:

Controller→  DIN → Chip 1→  DO →  DIN → Chip 2→  . .. → Chip nFDIN (backup)4.2.     Typical Application Circuit of Double Wire Cascade

To prevent the instantaneous high voltage generated by live plugging and unplugging of the product during testing from causing damage to the input and output pins of the chip signal, it should be addressed in the signal input andOutput pin connected in series with 100Ω Protect the resistor. In addition, the 104 decoupling capacitors of each chip in the figure are indispensable, and they are wired to the VDD and GND of the chipFeet should be as short as possible to achieve the best decoupling effect and stabilize chip operation.

4.3. Internal structure diagram

4.4. Input-output equivalent circuit

5、 Data refresh rate calculation

        CXLE87194 requires 24 bit data transmission for each pixel point (RGB three channel). At a communication rate of 1.2MHz, with a period of 830ns per bit, the transmission time for one pixel is approximately 20 seconds. The relationship between the number of cascaded pixels in the system and the refresh rate is as follows:ogu嘉泰姆

          Users can flexibly adjust the number of cascades and refresh rate according to actual project requirements.ogu嘉泰姆

The data refresh time is calculated based on how many pixels are cascaded in a system, with a set of RGB typically consisting of one pixel (or segment),ogu嘉泰姆
A CXLE87194 chip can control a set of RGB.ogu嘉泰姆
Calculate according to normal mode:ogu嘉泰姆
The 1-bit data period is 830ns (frequency 1.2MHz), and one pixel data includes 24 bits of R (8-bit), G (8-bit), and B (8-bit),ogu嘉泰姆
The transmission time is 830ns× 24≈ 20μs。 If there are a total of 1000 pixels in a system, the time to refresh all displays at once is 20 secondsogu嘉泰姆
× 1000=20ms， The one second refresh rate is: 1÷ 20ms=50Hz。ogu嘉泰姆
The following is a table of the highest data refresh rate corresponding to cascading points:ogu嘉泰姆
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6、 Electrical characteristics and reliability

•    Operating Temperature：-40℃ ~ +85℃ogu嘉泰姆

•    ESD protectionHuman body mode 4000Vogu嘉泰姆

•    Output current range：2mA ~ 25mAogu嘉泰姆

•    quiescent currentTypical 0.8mA (low-power design)ogu嘉泰姆

The chip is equipped with a power on reset circuit, which initializes all registers to zero and outputs a light off state after power on, ensuring safe system startup.ogu嘉泰姆
6.1.      Limit parameterogu嘉泰姆
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(1) The levels listed in the table above may cause permanent damage to the device and reduce its reliability when the chip is used for a long time. We do not recommend in itogu嘉泰姆
Under any conditions, the chip operates beyond these limit parameters;ogu嘉泰姆
(2) All voltage values are tested relative to the system ground.ogu嘉泰姆
6.2.    Recommended working conditionsogu嘉泰姆
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6.3.    Electrical Characteristicsogu嘉泰姆
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6.4.      Switch characteristicsogu嘉泰姆
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6.5.      temporal characteristicogu嘉泰姆
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(1) The chip can operate normally within the range of 830ns (frequency 1.2MHz) to 2.5-ms (frequency 400KHz) for 0-code or 1-code cycles, but 0-code and 1-codeogu嘉泰姆
The high-level time must comply with the corresponding numerical range in the table above;ogu嘉泰姆
(2) When no reset is required, the low-level time between bytes should not exceed 25 seconds, otherwise the chip may reset and then receive data again, making it impossible to achieve dataogu嘉泰姆
Correctly transmitted.ogu嘉泰姆
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6.6.      Functional Descriptionogu嘉泰姆

6.6.1      display dataogu嘉泰姆
        After the chip is powered on and reset, it begins to receive display data. After receiving 24 bits, the DO port starts forwarding data that continues to be sent from the DIN or FDIN end,ogu嘉泰姆
Provide display data for the next cascaded chip. Before forwarding data, the DO port remains at a low level. If the DIN or FDIN input resetsogu嘉泰姆
Reset signal, the OUT port of the chip will output a PWM waveform with corresponding duty cycle based on the received 24 bit display data, and the chip will wait for connection againogu嘉泰姆
Receive new data, and after receiving the initial 24 bit data, forward the data through the DO port. Before the chip receives the Reset signal, R、ogu嘉泰姆
G. The original output of B remains unchanged.ogu嘉泰姆
        The chip adopts automatic shaping and forwarding technology, and the signal will not be distorted or attenuated. For all cascaded chips, the data transmission cycle isogu嘉泰姆
coincident.ogu嘉泰姆

6.6.2      A complete frame of data structureogu嘉泰姆

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D1、D2、D3、D4、… … 、 Dn is the PWM setting command for each chip.ogu嘉泰姆
Reset indicates a reset signal, low level is valid.ogu嘉泰姆

6.6.3      Dn's data formatogu嘉泰姆

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Each PWM setting command contains 8× 3 bits of data, high bits are sent first.ogu嘉泰姆
R [7:0]: Used to set the PWM duty cycle of R output. All 0 codes indicate shutdown, all 1 code indicates maximum duty cycle, adjustable in 256 levels.ogu嘉泰姆
G [7:0]: Used to set the PWM duty cycle of G output. All 0 codes indicate shutdown, all 1 code indicates maximum duty cycle, adjustable in 256 levels.ogu嘉泰姆
B [7:0]: Used to set the PWM duty cycle of B output. All 0 codes indicate shutdown, all 1 code indicates maximum duty cycle, adjustable in 256 levels.ogu嘉泰姆

6.6.3      Data reception and forwardingogu嘉泰姆

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Among them, S1 is the data sent by the Di port of the controller, and S2, S3, S4, and Sn are the data forwarded by the cascaded CXLE87194.ogu嘉泰姆
Controller Di and Fi2 port data structure: D1D2D3D4… … Dn；ogu嘉泰姆
Controller Fi Port Data Structure: DxD1D2D3… … Dn；ogu嘉泰姆
Among them, Dx is any 24 bit data bit.ogu嘉泰姆
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        The process of chip cascading and data transmission and forwarding is as follows: the controller sends data S1, chip 1 absorbs D1, and if there is no reset at this timeogu嘉泰姆
Signal, chip 1 will continue to forward the data sent by the controller; Chip 2 absorbs D2. If there is no Reset signal at this time, chip 2ogu嘉泰姆
We will continue to forward the data sent by chip 1. Repeat this process until the controller sends a Reset signal, completing a data refresh cycle,ogu嘉泰姆
The chip has returned to the receiving preparation state. Reset low level is effective. If the low level is maintained for more than 80 seconds, the chip will be reset.ogu嘉泰姆

6.7.      Constant current curveogu嘉泰姆

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7、 Packaging and Pin Function

7.1.  Pin function

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1. Chip size: 400um * 600umogu嘉泰姆
2. The thickness of the top aluminum layer of PAD is 3.554umogu嘉泰姆
3. Please note that the substrate of the chip must be suspended or connected to GND

 

  eighty percentConclusion

        CXLE87194, as a high-performance and highly reliable three channel LED constant current driver chip, not only performs excellently in current consistency, color control, and cascade stability, but also has good compatibility and flexible configuration capabilities, suitable for various LED lighting and display scenarios.ogu嘉泰姆

For more product details and technical information, please visitJTM-IC official websiteWe will provide you with professional technical support and complete solutions.ogu嘉泰姆

nineTheSelection Guide for Related Chips;                          More similar products ....ogu嘉泰姆

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