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CXLE87133AL1 DMX512 differential parallel LED driver chip-with decoding and forwarding and multi-channel constant current output-JTM-IC

CXLE87133AL1 is a high-precision LED driver chip based on DMX512 differential parallel protocol, which supports 1/2/3/4 channel configurable output and has strong signal decoding and forwarding capabilities. The chip has built-in EPROM, which supports online code writing and convenient operation mode of "write code after installation", with a maximum addressing capacity of 4096 channels, and is suitable for large-scale lighting control systems.

CXLE87133AL1 DMX512 differential parallel LED driver chip-with decoding and forwarding and multi-channel constant current output-JTM-IC
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Product introduction

CXLE87133AL1: Multi-channel DMX512 LED driver chip with decoding and forwarding function

In today's increasingly complex intelligent lighting control system, a high-performance, multi-functional LED driver chip has become the key to achieve complex lighting effects. As a driver chip integrating DMX512 signal decoding, data forwarding and multi-channel constant current output, CXLE87133AL1 is widely used in high-end application scenarios such as architectural appearance lighting, stage lighting, LED video wall, etc.2Mw嘉泰姆


First, product overview

CXLE87133AL1 is a high-precision LED driver chip based on DMX512 differential parallel protocol, which supports 1/2/3/4 channel configurable output and has strong signal decoding and forwarding capabilities. The chip has built-in EPROM, which supports online code writing and convenient operation mode of "write code after installation", with a maximum addressing capacity of 4096 channels, and is suitable for large-scale lighting control systems.2Mw嘉泰姆

Its unique DO port can output 800Kbps to 0 code data, directly drive 800Kbps rate IC such as CXLE87152 and CXLE87145, realize lossless expansion and cascading of signals, and greatly improve the flexibility of system design.2Mw嘉泰姆


Second, the core functional characteristics

• High compatibility with adaptive decodingFully compatible with DMX512(1990) protocol, supports 200Kbps ~ 500Kbps transmission rate adaptation, no external settings.2Mw嘉泰姆

• Configurable output channels: Support 1/2/3/4 field data reading mode, users can flexibly configure the number of output channels according to actual needs.2Mw嘉泰姆

• Data forwarding capability: DO port supports 800Kbps return to 0 code output, can forward 192 channel data, and is suitable for signal expansion of complex systems.2Mw嘉泰姆

• High precision constant current output: The output current of each channel is adjustable from 3mA to 60mA, and the current difference between channels and chips is controlled within 3%.2Mw嘉泰姆

• Reverse polarity down outputPWM pin optional reverse polarity output mode, suitable for external triode, MOS tube or high-power constant current driver IC.2Mw嘉泰姆

• High refresh rate and stability: Screen refresh rate up to 3kHz, with output delay control, effectively reduce the surge current interference.2Mw嘉泰姆

• Industrial grade reliability: Operating temperature range -40 ℃ ~ 85 ℃, with 3000V antistatic ability, suitable for all kinds of harsh environment.2Mw嘉泰姆


Three, typical application areas

CXLE87133AL1 are widely used in the following scenarios:2Mw嘉泰姆

•    Architectural appearance lighting: point light source, line lamp, wall washer2Mw嘉泰姆

•    Stage Performance Lighting System2Mw嘉泰姆

•    Indoor and outdoor LED video wall2Mw嘉泰姆

•    Urban Lighting and Landscape Lighting Project2Mw嘉泰姆

•    All kinds of RGB/RGBW full color lighting system2Mw嘉泰姆


Four, the package and pin description

The chip is packaged in SOP16, and the pin functions include:2Mw嘉泰姆

•    OUTR/OUTG/OUTB/OUTW: Quad-channel PWM output2Mw嘉泰姆

•    REXT: external resistor to set the output current2Mw嘉泰姆

•    AI/BI: differential signal input2Mw嘉泰姆

•    DO: Decode Forward Output2Mw嘉泰姆

•    PORT0/PORT1: Field select pin for configuring output mode2Mw嘉泰姆


Five, detailed technical advantages

5.1. Flexible output mode configuration.

Through the level setting of PORT0 and PORT1 pins, users can realize flexible configuration of 1~4 fields:2Mw嘉泰姆

•    00:3 Field Mode (R/G/B)2Mw嘉泰姆

•    01:4 field mode (R/G/B/W)2Mw嘉泰姆

•    10:2 Field Mode (RG/BW)2Mw嘉泰姆

•    11:1 field mode (RGBW merge)2Mw嘉泰姆

In 1-field mode, four channels can be used in parallel, with a maximum output current of 240mA, meeting the needs of high-power monochrome applications.2Mw嘉泰姆

CXLE87133AL1 the constant current characteristic is excellent, the current difference between channels and even between chips is extremely small.2Mw嘉泰姆
(1) The current error between channels is less than ± 3℉, while the current error between chips is less than ± 3℉.2Mw嘉泰姆
(2) When the load terminal voltage changes, the CXLE87133AL1 output current is not affected, as shown in the figure below.2Mw嘉泰姆
(3) As CXLE87133AL1 in the following figure, the relationship between the current I of the output port and the voltage Vds applied to the port shows that the smaller the current I,2Mw嘉泰姆
The Vds required in the state is also smaller.2Mw嘉泰姆
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5.2. Precise constant current output control

The output current is accurately set by the external resistor of REXT pin, and the formula is:2Mw嘉泰姆

Iout​=48/(250 Rext)

Users can set any current value in the range of 3mA ~ 60mA according to their needs to ensure that the brightness of each channel is consistent.2Mw嘉泰姆
OUTR,OUTG,OUTB,OUTW are constant current output, the maximum current can reach 60mA, it is not recommended to set the current to a larger value application. Constant current2Mw嘉泰姆
The current value is determined by the resistance of REXT to ground. Current formula:2Mw嘉泰姆
Iout=48/(250 Rext) (1)2Mw嘉泰姆
Rext=(48/Iout)-250 (2)2Mw嘉泰姆
Rext is the resistor across the REXT pin and ground, and Iout is the current output from the OUTR,OUTG,OUTB,OUTW ports.2Mw嘉泰姆
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5.3. Reliable code writing and address management.

The chip supports online code writing, and the AI level higher than BI needs to be maintained during the code writing process. After the code is written successfully, the chip lights up and the blue light indicates that the new address will take effect immediately and there is no need to power on again. E² PROM with dual backup design, part of the memory damage does not affect the address read.2Mw嘉泰姆

5.4. Powerful signal expansion capability

The 800Kbps return-to -0 code output from the DO port can directly drive a variety of 800Kbps rate IC, realizing long-distance transmission of signals and cascading of multiple devices, greatly expanding the system's load capacity.2Mw嘉泰姆
5.5. Communication data protocol:
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CXLE87133AL1 data reception is compatible with standard DMX512(1990) protocol and expanded DMX512 protocol, with data transmission rate of 200Kbps2Mw嘉泰姆
500Kbps adaptive decoding. The protocol waveform is as follows: the chip is AI and BI differential input, and the timing waveform of the AI is drawn in the figure, BI2Mw嘉泰姆
Contrary to AI2Mw嘉泰姆
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Note1: The field has 11 bits, including 0 start bit, 8 data bits and 2 stop bits. where the 0 start bit is low and the stop bit is high2Mw嘉泰姆
Level, the data in the data bit is 0, the corresponding time period is low level; the data is 1, the corresponding time period is high level. 0 Start Bit2Mw嘉泰姆
The bit duration of the stop bit and the data bit must be the same.
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5.6. IC Reception Instructions:2Mw嘉泰姆

1. When a reset signal appears on the AIBI line, the IC enters the receive ready state. Address counter clear 0.2Mw嘉泰姆
2. The first field in the data packet is the starting field, and its 8-bit data must be "0000_0000", which is not used as display data. Use2Mw嘉泰姆
The displayed valid fields start from the second field, and the second field of the DMX512 packet is the first field of valid data. IC Adaptive Number2Mw嘉泰姆
According to the transmission rate is 200Kbps ~ 500Kbps. Different rates correspond to different field lengths, but regardless of whether the transmission frequency is 200Kbps or2Mw嘉泰姆
500Kbps, as long as the duration of all valid fields is the same as the duration of the starting field.2Mw嘉泰姆
3. The IC determines the corresponding field in the intercepted DMX512 packet according to its address in E2. If the chip address is 0000_0000_0000, from the data2Mw嘉泰姆
The first valid field of the packet is intercepted, and the address 0000_0000_0001 is intercepted from the second valid field. How many fields the chip uses, by PT12Mw嘉泰姆
and PT0 settings.2Mw嘉泰姆
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The 1-field mode and 2-field mode in the above table can realize the function of expanding the flow, such as 1-field mode (generally monochrome application), can be.2Mw嘉泰姆
The four output pins OUT/OUTR/OUTGB/OUTW are connected in parallel, and the maximum output current can reach 240mA. The above fields are selected as data forwarding2Mw嘉泰姆
and flow expansion, when there is no need to expand the flow and in the case of point light application (no need to forward data), from monochrome to RGB three-color application.2Mw嘉泰姆
Both PORT0 and PORT1 can be suspended.2Mw嘉泰姆
4. When IC receives data, the interval between two reset signals cannot be less than 4ms, and the frame rate cannot be greater than even if the number of parallel connections is very small.2Mw嘉泰姆
250Hz。
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5.7. Precautions for controller sending data:2Mw嘉泰姆

1. For the standard DMX512(1990) protocol, if one branch port of the controller is connected to 512 channels, that is, 170 pixels,2Mw嘉泰姆
To achieve a refresh rate of 30Hz, then the time width of each frame is 33.33ms and the time for transmitting 1bit is 4μs, then the effective data time width is2Mw嘉泰姆
88 4 μs * 11bit * 512=22.7ms, then the time interval between each frame of data is 33.33-22.7=10.63ms. In this time interval2Mw嘉泰姆
The internal data line remains high until the next reset signal.2Mw嘉泰姆
2. The reset signal code interval of each data packet of the CXLE87133 controller shall not be less than 4ms, I .e. the maximum frame frequency shall not be higher than 250Hz,2Mw嘉泰姆
Otherwise, the screen may not be displayed normally.
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5.8. Precautions for Code Writing:2Mw嘉泰姆

1. In addition to the address writing terminal (PO), the code writer shall have terminals A and B. When writing codes, the AI and BI lines shall be connected to the terminals A and B of the code writer,2Mw嘉泰姆
The A and B terminals of the code writer maintain the level of A high and B low when writing codes, and the IC can write codes normally only when the AI is high and BI is low.2Mw嘉泰姆
2. After the code writing is completed, the IC that receives the new address code drives the blue light to be on, and the newly written address code takes effect.2Mw嘉泰姆
3. Do not remove the AB line after the code writing is completed, and use the special test program provided by the code writer to test to confirm whether the code writing is complete.2Mw嘉泰姆
Correct.2Mw嘉泰姆
4. The address input line on the PO port of the code writer should be pulled out from the code writer after the code writing is completed, so as to avoid miswriting codes when the code writer is out of order. Write2Mw嘉泰姆
After the code line is pulled out, it can be suspended and wrapped with insulating tape without special grounding.
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5.9 differential bus connection considerations:2Mw嘉泰姆

1. The common ground must be shared between the controller and the IC and between the IC to prevent excessive common mode voltage from breaking down the IC. The shielding layer can be used as the common ground wire.2Mw嘉泰姆
By connecting multiple IC nodes and reliably grounding at one point, it is not possible to ground double-ended or multi-ended.2Mw嘉泰姆
2. The protection resistance connected in series between the AI line and the BI line on the board and the IC must be the same, and the routing mode of the AIBI line on the board from the pad to the IC must be as one as possible.2Mw嘉泰姆
To.2Mw嘉泰姆
3.AI and BI buses use shielded twisted pair as much as possible (especially in the common project of strong and weak current wiring trunking, near the transmission tower or more lightning2Mw嘉泰姆
area) to reduce interference and lightning shock. Use ordinary super 5 shielded twisted pair, but pay attention to the purchase of copper wire.2Mw嘉泰姆
In the 4.485 bus, the distance between the 485 node and the trunk should be minimized, and it is generally recommended that the 485 bus use a hand-in-hand bus topology.2Mw嘉泰姆
The star structure will produce reflected signals, which will affect the quality of 485 communication. If the distance between the 485 node and the 485 bus backbone must be required during the construction process2Mw嘉泰姆
From more than 30cm distance, it is recommended to use 485 repeater to make a 485 bus fork. If star topology is required during construction2Mw嘉泰姆
structure, a 485 hub should be used.2Mw嘉泰姆
5.485 bus with the extension of the transmission distance, will produce echo reflection signal, if the transmission distance of the 485 bus is long, it is recommended that the construction2Mw嘉泰姆
A 120 ohm terminal matching resistor is connected to the AI and BI lines at the end of the 485 communication.
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Six, the application of design recommendations

6.1. Application Figure 1:RGBW 4 color application
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Note: 1. Output high-precision constant current, up to 60mA per channel, and up to 4 sets of lamps (15mA/set) in parallel per channel.2Mw嘉泰姆
2. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.2Mw嘉泰姆
3. When writing codes, IC needs to keep AI at a higher level than BI. It is recommended to connect AI and BI buses to terminals A and B of the code writer, and the code writer2Mw嘉泰姆
A is provided at a higher level than B.2Mw嘉泰姆
4.REXT port must add resistance to ground to set the output current, this port can not be floating.2Mw嘉泰姆
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased2Mw嘉泰姆
If the channel current is set to 40mA, a capacitance value above 105 is recommended.
6.2. Application Figure 2:RGB 3 Color Application
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Note: 1. Output high-precision constant current, up to 60mA per channel, and up to 4 sets of lamps (15mA/set) in parallel per channel.2Mw嘉泰姆
2. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.2Mw嘉泰姆
3. When writing codes, IC needs to keep AI at a higher level than BI. It is recommended to connect AI and BI buses to terminals A and B of the code writer, and the code writer2Mw嘉泰姆
A is provided at a higher level than B.2Mw嘉泰姆
4.REXT port must add resistance to ground to set the output current, this port can not be floating.2Mw嘉泰姆
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased2Mw嘉泰姆
If the channel current is set to 40mA, a capacitance value above 105 is recommended.
6.3. Application Figure 3: Two-color application
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Note: 1. In two-color application, the chip itself intercepts 2 bytes of data, the channel OUTR and OUTG data are the same, and the channel OUTB and OUTW data are the same,2Mw嘉泰姆
The figure shows a parallel current expansion application. The maximum output current is 120mA after 2 channels are connected in parallel.2Mw嘉泰姆
2. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.2Mw嘉泰姆
3. When writing codes, IC needs to maintain a higher level of A than B. It is recommended to connect AI and BI buses to terminals A and B of the code writer, which are raised by the code writer.2Mw嘉泰姆
A is higher than B.2Mw嘉泰姆
4.REXT port must add resistance to ground to set the output current, this port can not be floating.2Mw嘉泰姆
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased2Mw嘉泰姆
If the channel current is set to 40mA, a capacitance value above 105 is recommended.
6.4. Application Figure 4: Monochrome Application
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Note: 1. In monochrome application, the chip itself intercepts 1 byte of data, and the data of 4 channels are the same. The figure shows parallel flow expansion application. After 4 channels are connected in parallel2Mw嘉泰姆
Maximum output current 240mA.2Mw嘉泰姆
2. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.2Mw嘉泰姆
3. When writing codes, IC needs to keep AI at a higher level than BI. It is recommended to connect AI and BI buses to terminals A and B of the code writer, and the code writer2Mw嘉泰姆
A is provided at a higher level than B.2Mw嘉泰姆
4.REXT port must add resistance to ground to set the output current, this port can not be floating.2Mw嘉泰姆
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased2Mw嘉泰姆
If the channel current is set to 40mA, a capacitance value above 105 is recommended.
6.5. Application Figure 5: Application of external triode (MOS tube or high-power constant current drive can also be externally connected)
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Note: 1. When the PWM pin is connected to VDD, it is a reverse polarity reduced frequency constant voltage output, which is suitable for external NPN triode base (B),MOS tube or any device with DIM2Mw嘉泰姆
(Dimming end) High power constant current driver IC. When applying, the output pin can be pulled up to VDD or to other power supplies. The pull-up resistor R is generally taken2Mw嘉泰姆
About 5k.2Mw嘉泰姆
2. The above figure is the application diagram of the 4-channel reverse polarity application. Note PORT0 and PORT1 port selection when other fields are applied with reverse polarity.2Mw嘉泰姆
3. When writing codes, IC needs to keep AI at a higher level than BI. It is recommended to connect AI and BI buses to terminals A and B of the code writer, and the code writer2Mw嘉泰姆
A is provided at a higher level than B.2Mw嘉泰姆
4.REXT can be suspended when applied in reverse polarity.2Mw嘉泰姆
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If current expansion is used, it is recommended to increase the capacitance value to 1062Mw嘉泰姆
Above, to reduce the fluctuation interference of the circuit VCC.
6.6. Component Selection Table
The RZ selection value table is as follows2Mw嘉泰姆
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(1) Selection of VDD voltage dividing resistor Rz2Mw嘉泰姆
It is recommended to set VDD current to 10mA and VDD regulated to 5.2V, so Rz =(VCC-5.2)/0.01, for example, when VCC is equal to 24V,2Mw嘉泰姆
From the formula, Rz takes the value 1.88 KΩ.2Mw嘉泰姆
(2) Value selection of lamp string resistance R2Mw嘉泰姆
Since the long-term power consumption of SOP16 package cannot be greater than 400mW, the IC power consumption should be set to be less than 400mW. As the drive current increases, it should2Mw嘉泰姆
The output voltage Vout of the reduced chip channel is 400mW>5.2V * 10mA Vout * Iout * N(N is the number of channels and Vout is the channel port2Mw嘉泰姆
Voltage, Iout is the channel setting current), when N = 4,Iout = 30mA, Vout<2.9V, and because Vout = VCC-M * VL-R * Iout(M2Mw嘉泰姆
For the number of lamps connected in series on a single channel, VL is the voltage drop of the lamp), when VCC = 24V,VL = 2,M = 8, R>170 Ω, in addition, in order to make2Mw嘉泰姆
The output constant current should also be Vout>0.8V, so R<240 Ω, in order to make the chip have better output characteristics when the power consumption meets the requirements.2Mw嘉泰姆
It is recommended that R choose an appropriate intermediate value.
 

6.7. In practical application, it is recommended that attention be paid to the following points:2Mw嘉泰姆

•    Power Supply Design: According to the power supply voltage (5V/12V/24V), the step-down resistor Rz is reasonably selected to ensure that the chip power consumption does not exceed 400mW.2Mw嘉泰姆

•    Signal wiring: AI/BI signal line shall be shielded twisted pair, with "hand in hand" topology structure, and 120Ω matching resistor shall be installed at the end.2Mw嘉泰姆

•    Code writing settings: When writing codes, ensure that the AI is higher than the BI level. It is recommended to use a special coder to provide the correct level.2Mw嘉泰姆

•    Thermal considerations: In high-current applications, the heat dissipation path should be reasonably designed to ensure that the operating temperature of the chip is within a safe range.2Mw嘉泰姆

6.8. Advantages of comparison with CXLE87133BC

Compared with CXLE87133BC,CXLE87133AL1 has unique advantages in the following aspects:2Mw嘉泰姆

•    With data forwarding function, support 800Kbps to 0 code output2Mw嘉泰姆

•    Support 1~4 channel flexible configuration, applicable to a wider range of scenarios2Mw嘉泰姆

•    The field selection function implements the hardware configuration of the output mode.2Mw嘉泰姆

•    Competitive cost advantages while maintaining performance2Mw嘉泰姆


Seven, working conditions

7.1 limit operating conditions

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(1) The long-term operation of the chip under the above-mentioned extreme parameter conditions may cause the reliability of the device to be reduced or permanently damaged.2Mw嘉泰姆
It is recommended that any one of the parameters meet or exceed these limits in actual use.2Mw嘉泰姆
(2) All voltage values are tested relative to the system ground.
7.2. Recommended working conditions
7.3. Electrical characteristics
 

Seven, the conclusion

With its high integration, flexible configuration capability, powerful signal expansion characteristics and stable output performance, the CXLE87133AL1 has become an ideal drive solution in modern intelligent LED lighting systems. Whether it is used for architectural decorative lighting, stage effect control, or large video wall systems, it can provide reliable, efficient and accurate drive support.2Mw嘉泰姆

For more information on CXLE87133AL1 technical materials, applications or procurement information, please visitJTM-IC official website. We are committed to providing customers with complete LED driver solutions and professional technical support services.2Mw嘉泰姆


Eight,Related Chip Selection Guide Download                   ►►More similar products....2Mw嘉泰姆

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