CXLE87133AC4 is a four-channel high-precision constant current driver chip based on DMX512 differential parallel protocol. Its biggest feature is that it has a built-in decoding and forwarding module, which can convert the received DMX512 signal into 800Kbps single-line return-to-zero code signal through DO port, and can directly control JTMIC's 18/19 series high-speed LED driver IC. A single chip can forward up to 192 channels of data. This feature makes it a central hub for building large cascaded lighting systems.
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[ CXLE87133AC4 ]"
1. Chip Overview: Decoding and Forwarding Integrated Drive Scheme
CXLE87133AC4 is a four-channel high-precision constant current driver chip based on DMX512 differential parallel protocol. Its biggest feature is the built-in decoding and forwarding module, which can be used throughDO PortConvert the received DMX512 signal800Kbps single-line return-to-zero code signal, And can directly control JTMIC's 18/19 series high-speed LED driver IC, a single chip can forward up192 channelsof data. This feature makes it a central hub for building large cascaded lighting systems.
2. core features: technical advantages in-depth analysis
2.1. Comprehensive DMX512 protocol compatibility
The chip is fully compatible with DMX512(1990) and extended protocol, supports200Kbps to 1000KbpsTransmission rate adaptive decoding without external settings. Maximum addressing capacity4096 channelTo meet the needs of ultra-large-scale lighting projects.
2.2. Innovative data forwarding capabilities.
UniqueDO Decode Forwarding OutputThe DMX512 differential signal can be converted to a single-wire 800Kbps signal to realize the hybrid control and system expansion of different protocol chips, which greatly simplifies the wiring complexity.
2.3. High precision constant current output
Provide R, G, B, W four independent constant current output, current range3mA to 80mAIt is precisely set by a single external resistor (REXT). Current accuracy difference between channels<±3%, chip-to-chip differences<±3%Ensure that the colors are highly consistent.
2.4. Flexible PWM control modes
The PWM pin supports output polarity selection and can be switched to when VDD is connected.Reverse polarity down output modeAt this time, the port refresh rate is reduced to 500Hz, which is specially designed for external triode, MOS tube or high-power constant current drive IC.
2.5. Reliable system design and protection
The built-in EPROM supports online code writing and dual backup of addresses, and some memory damage does not affect address reading. Industrial grade design (-40 ℃ to 85 ℃), with output channel gradual delay function, effectively reduce the surge current interference.
3. Typical Application Scenario: Enabling Complex Lighting System
• Large Building Media Facade: Control a large number of pixels through the DO port cascade, simplifying the wiring structure.
• Professional stage lighting systemMixed control of different protocol lamps, to achieve unified programming management
• Urban landscape lighting engineering: Bridges, squares and other ultra-long distance lighting control system
• Intelligent decorative lightingVideo wall, interactive light art installation
4. core technology analysis: to achieve the best system performance
4.1. Constant current setting principle
4.1.1. Output constant current setting:
The output current is precisely set by the REXT resistor, and the calculation formula is:
For example, setting 20mA output current requires 2KΩ resistor and 36mA requires 933Ω resistor.
OUTR,OUTG,OUTB,OUTW are constant current output, the maximum current can reach 80mA, it is not recommended to set the current to a larger value application. Constant
The current value is determined by the resistance of REXT to ground. Current formula:
Iout=48/(400 Rext) (1)
Rext=(48/Iout)-400 (2)
Rext is the resistor across the REXT pin and ground, and Iout is the current output from the OUTR,OUTG,OUTB,OUTW ports.

4.1.2. Constant current curve:
CXLE87133AC4 the constant current characteristic is excellent, the current difference between channels and even between chips is extremely small.
(1) The current error between channels is less than ± 3℉, while the current error between chips is less than ± 3℉.
(2) When the load terminal voltage changes, the CXLE87133AC4 output current is not affected, as shown in the figure below.
(3) CXLE87133AC4 the relationship between the current I of the output port and the voltage Vds applied to the port as shown in the following figure, the smaller the current I,
The Vds required in the constant current state is also smaller.
4.2. Data forwarding mechanism.
The 800Kbps single-wire signal output from DO port can directly drive JTMIC 18/19 series IC to build"DMX512 Trunk Single Line Branch"hybrid network architecture with stability and flexibility.
4.3. Reverse polarity output application
When the PWM pin is connected to VDD, the chip converts to constant voltage reverse polarity output, which is specially designed for external power devices:
• Triode drive: output pin is connected to 2.5K pull-up resistor, base current> 1mA
• MOS tube driver: The output pin is connected with a pull-up resistor above 10K to the gate
• Switching constant current IC driverDirectly connect DIM pin, it is recommended to install CDIM filter capacitor
Key points of 5. system design: ensure stable operation
5.1. PCB Layout Specification
• AI/BI differential lines must be routed in parallel, shielded twisted pair is recommended
• REXT resistor as close as possible to the chip pin, short and thick connection
• VDD pin must be arranged with more than 104 decoupling capacitor, and more than 105 is recommended for high current applications.
5.2. Power Supply Design Considerations
• 24V system: step-down resistor Rz selection 2K-2.4K
• 12V system: step-down resistor Rz selection 750-820Ω
• 5V system: step-down resistor Rz selection 82Ω
5.3. Anti-interference measures
• Parallel 120Ω matching resistor at the end of 485 bus
• In strong interference environment, the filter capacitor can be added within 103 of ADRI pin to ground.
• It is recommended to add 47uF electrolytic 105 ceramic chip capacitor combination for switching power supply
Comparison of 6. application schemes
| Application Scenarios | Core advantages | Recommended Configuration |
|---|---|---|
| RGBW full color lamps | Four-channel independent control, rich color | 4-field mode, REXT set current |
| Monochrome high-power lamps | High drive capability, simplified control | Reverse polarity output external MOS tube |
| hybrid protocol system | Flexible expansion, unified management | DO Port Forwarding 18 Series IC |
| Long-distance transmission project | Stable and reliable, strong anti-interference | Shielded Twisted Pair Terminal Matching |
6.1. Application Figure 1:RGBW 4 color application

Note: 1. The A and B line code writing methods are adopted. When writing codes, the code writer/controller does not need to be connected to the ADRI of the first IC.
2. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.
3. REXT port must add resistance to ground to set the output current, this port cannot be suspended.
4. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased,
For example, if the channel current is set to 40mA, it is recommended to use a capacitance value above 105.

Note: 1. If this application needs to forward data, be sure to confirm whether the suspension of W channel (chip fixed intercept 4 data) affects the actual use.
2. The A and B line code writing methods are adopted. When writing codes, the code writer/controller does not need to be connected to the ADRI of the first IC.
3. Pay attention to the selection of the voltage dividing resistor R to avoid excessive power consumption of the IC.
4. REXT port must add resistance to ground to set the output current, this port can not be floating.
5. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If the channel current is set to be larger, the capacitance value should be increased,
For example, if the channel current is set to 40mA, it is recommended to use a capacitance value above 105.

Note: 1. When the PWM pin is connected to VDD, it is a reverse polarity reduced frequency constant voltage output, which is suitable for external NPN transistor base (B), and the output pin is applied
The pull-up resistor R1 is connected to VDD, and the pull-up resistor R1 should select the corresponding resistance value according to the amplification factor of the triode and the required current. When the output current is large,
When the pull-up resistor needs to be less than 5K (the base current is greater than 1mA), the value of the step-down resistor should be reduced accordingly and the 5V regulator tube or its
He 5V regulator.
2. Figure 9 is the application diagram of 4-channel reverse polarity application.
3.REXT can be suspended when applied in reverse polarity.
4. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If current expansion is used, it is recommended to increase the capacitance value to 106
Above, to reduce the fluctuation interference of the circuit VCC.

Note: 1. When the PWM pin is connected to VDD, it is a reverse polarity reduced frequency constant voltage output, which is suitable for external MOS tube gate (G) or high-power constant current drive. Application
When the output pin is connected to the pull-up resistor R1 to VDD, the pull-up resistor takes a value of more than 10K.
2. Figure 10 is an application diagram of a 4-channel reverse polarity application.
3.REXT can be suspended when applied in reverse polarity.
4. The 104 capacitance of VCC to ground is the recommended value when the channel current is set to 20mA. If current expansion is used, it is recommended to increase the capacitance value to 106
Above, to reduce the fluctuation interference of the circuit VCC.

Note: 1. When the PWM pin is connected to VDD, it is a reverse polarity frequency reduction constant voltage output, which is suitable for external high-power constant current driver IC.
Figure 13 is an application diagram of 4-channel reverse polarity application.
3. REXT can be suspended when applied in reverse polarity.
4. Constant current drive IC components or operation, please refer to the CXLE87184 specification.
5. When using switch-type constant current drive IC, interference may be very large (and power wiring and other factors are related), the system will produce
Noise and surge, in order to avoid problems such as code writing or abnormal picture changes, the following measures are recommended:
A. the VDD pin of the CXLE87184 is directly connected to the CXLE87133AC4 buck resistor RZ and connected to the same anti-reverse connection diode
In order to reduce the impact of surge, the CXLE87184 VDD and buck resistor RZ cannot be connected behind different anti-reverse diodes.
B, the line from the VDD pin CXLE87184 on the circuit board to the CXLE87133AC4 buck resistor RZ is as thick and short as possible (as close as possible, etc.
Potential), the trace between the GND pin of the CXLE87184 and the GND pin of the CXLE87133AC4 is as thick and short as possible (as close to the equipotential as possible).
C, in each CXLE87184 near VDD and GND pins and a 47uF electrolytic capacitor and a 105 capacitor, near CXLE87133
The AC4 step-down resistor RZ and GND pins are combined with a 47uF electrolytic capacitor and a 105 capacitor.
D and AB lines are always wired in parallel on the board. Do not insert other elements between AB lines under special circumstances that cannot be crossed.
pieces or traces (even in special cases to be limited to the shortest local). Otherwise, the anti-interference function of AB line balanced transmission will be weakened.
E, in special cases, because the PWM pin is interfered, resulting in abnormal control, at this time need to CXLE87184 the PWM pin pair
GND plus a capacitor CDIM, the size of the capacitor depends on the actual situation, generally in the tens to 100PF.
F when the code cannot be written due to excessive interference, a filter can be added between the ADRI pin of the CXLE87133AC4 and GND.
Capacitance (CPI), in order to filter out certain interference, capacitance size is generally recommended within 103.


(1) Value selection of lamp string resistance R
Since the long-term power consumption of the package is recommended not to be greater than 480mW, the IC power consumption should be set to be less than 480mW. As the drive current increases,
The output voltage Vout of the chip channel should be reduced, I .e. 480mW>5.2V * 10mA Vout * Iout * N(N is the number of channels and Vout is the channel end
Port voltage, Iout is the channel setting current), when N = 4,Iout = 30mA, Vout<3.5V, and because Vout = VCC-M * VL-R * Iout
(m is the number of lamps connected in series on a single channel, VL is the voltage drop of the lamps), when VCC = 24V,VL = 2,M = 8, R>150 Ω is obtained, in addition, it is
In order to make the output constant current, Vout>0.8V, so R<240 Ω, in order to make the chip have better output when the power consumption meets the requirements
characteristics, it is recommended that R choose the appropriate intermediate value.
7. working conditions
7.1 limit operating conditions

(1) The long-term operation of the chip under the above-mentioned extreme parameter conditions may cause the reliability of the device to be reduced or permanently damaged.
It is recommended that any one of the parameters meet or exceed these limits in actual use.
(2) All voltage values are tested relative to the system ground.

Eight, electrical characteristics and functions

1000Kbps adaptive decoding. The protocol waveform is as follows: the chip is AI and BI differential input, and the timing waveform of the AI is shown in the figure,
BI is the opposite of AI.
is a high level, the data in the data bit is 0, the corresponding time period is a low level; the data is 1, the corresponding time period is a high level. 0
The bit duration of the start bit stop bit and the data bit must be the same.
8.3.2.The first field in the packet is a start field whose 8-bit data must be "0000_0000", and this field is not used as display data.
The valid fields for display start from the second field, and the second field of the DMX512 packet is the first field of valid data. IC can be adaptive
The data transmission rate is 200Kbps ~ 1000Kbps.
8.3.3. The IC determines which field in the DMX512 packet to intercept based on its address in E2. If the chip address is 0000_0000_0000, from
The first valid field of the data packet starts to be intercepted, and the address 0000_0000_0001 starts to be intercepted from the second valid field. The chip uses 4 fields.
8.3.4. When the IC receives data, the interval between the two reset signals cannot be less than 4ms, and the frame rate cannot be greater than even if the number of parallel connections is very small.
250Hz。
To achieve a refresh rate of 30Hz, then the time width of each frame is 33.33ms and the time for transmitting 1bit is 4μs, then the effective data time width
For 884μs * 11bit * 512=22.7ms, then the time interval between each frame of data is 33.33-22.7=10.63ms. in this time
The data line remains high during the interval until the next reset signal.
8.4.2. The CXLE87133AC4 requires that the reset signal code interval of each data packet of the controller cannot be less than 4ms, that is, the highest frame rate cannot be higher
250Hz, otherwise the screen may not be displayed normally.
8.5.2. Do not remove the AB line after the code writing is completed, and test it with the special test program provided by the code writer to confirm whether the code writing is completed.
All right.
8.5.3. AI the code writer, the address input line on the BI port should be pulled out from the code writer after the code writing is completed to avoid miswriting when the code writer is out of order.
Code. After the code line is pulled out, it can be suspended and wrapped with insulating tape without special grounding.
Reliable connection of multiple IC nodes, and reliable grounding at one point, not two-terminal or multi-terminal grounding.
8.6.2.The protection resistance of AI line and BI line to IC on the board must be consistent, and the routing mode of AIBI line from pad to IC on the board must be as far as possible
Consistent.
8.6.3.AI, BI bus as far as possible to use shielded twisted pair (especially in the strong and weak current trunking common project, near the transmission tower or lightning.
more areas) to reduce interference and lightning shock. Use ordinary super 5 shielded twisted pair, but pay attention to the purchase of copper wire.
8.6.4.The 485 node in the 485 bus should minimize the distance from the trunk. Generally, it is recommended to use the hand-in-hand bus topology for the 485 bus.
Structure. The star structure will produce reflected signals, which will affect the quality of 485 communication. If the 485 node must be required to be separated from the 485 bus during construction
Trunk distance more than 30cm above the distance, it is recommended to use 485 repeater to make a 485 bus bifurcation. If required during construction
With a star topology, 485 hubs should be used.
8.6.5. 485 bus with the extension of the transmission distance, will produce echo reflection signal, if the transmission distance of the 485 bus is long, it is recommended to apply
The working hours are connected to a 120 ohm terminal matching resistor on the AI and BI lines at the end of the 485 communication.
9. Pins and Functions
TenSummary
CXLE87133AC4 provides a new solution for complex lighting systems by integrating DMX512 decoding and single-wire data forwarding. Its excellent channel consistency, flexible output configuration and powerful system expansion capabilities make it a key component for connecting different devices and achieving unified control in high-end lighting projects.
For CXLE87133AC4 samples, complete design information, or technical support, please visitJTMIC official websiteContact our engineering team.
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