In the context of increasingly stringent energy efficiency requirements for displays, server power supplies and high-end AC/DC devices, the CXSU63307 critical conduction mode active power factor correction (PFC) controller has become an ideal solution for the design of small and medium power switching power supplies due to its ultra-low harmonic distortion and multiple intelligent protection features.
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[ CXSU63307 ]"
CXSU63307: Innovation of high efficiency PFC controller for small and medium power supply
In the context of increasingly stringent energy efficiency requirements for monitors, server power supplies, and high-end AC/DC devices,CXSU63307 critical conduction mode active power factor correction (PFC) controllerWith its ultra-low harmonic distortion and multiple intelligent protection features, it is an ideal solution for small and medium power switching power supply design.
1. Core Advantage: Redefining Power Efficiency Standards
1. Harmonic optimization core technology
Built-in original harmonic optimization multiplier, through the special structure design of the AC input current harmonic distortion to a very low level. Power factor over wide input voltage (90V-265V AC) and dynamic load rangeInfinitely close to 1far beyond the traditional PFC scheme.
2. Energy efficiency breakthrough design
a. Low starting current50μA(VCC = 11V), support high resistance start resistance, reduce standby loss
B. Working current only2.3mA(typical), significantly reducing the power supply capacitor capacity
c. Critical conduction mode (CrM) architecture to optimize energy efficiency in small and medium power scenarios
3. Six-fold protection system
| Type of protection | trigger mechanism | response speed |
|---|---|---|
| Dynamic Overvoltage (DYN OVP) | COMP current> 32μA step down power | microsecond level |
| Static Overvoltage (STAT OVP) | COMP voltage <2.3V shutdown output | nanosecond level |
| Output Open Loop | INV<0.2V OFF/>0.45V RECOVERY | Cycle level |
| VCC Undervoltage Lockout | 9.7V ON/12.5V OFF | Hardware level |
| drive clamp | 18V Gate Voltage Clamp | instantaneous trigger |
| Cycle-by-cycle current limiting | Peak current = 1.08V/Rs | Each switching cycle |
Analysis of 2. Intelligent Control Mechanism
1. Accurate current tracking
Real-time monitoring of the zero-crossing of the inductor current through the ZCD pin (trigger threshold: falling edge 0.7V/rising edge 1.4V), combined with the multiplier output:
(V) -2.5 (V) // K = 0.38 typical)
The MOSFET turn-on timing is dynamically modulated so that the input current perfectly tracks the voltage waveform.
A. leading edge blanking (LEB) technology: 200ns masking period to eliminate false triggering of switch spikes
B. ZCD dual voltage clamp: 5.7V high clamp/0V low clamp, resistant to ± 10kV surge interference
c. Current detection anti-offset: CS pin ± 34mV automatic compensation
3. key electrical characteristics (25 ℃/VCC = 15V)
| Module | Parameters | Minimum | Typical value | Maximum |
|---|---|---|---|---|
| error amplifier | Reference voltage accuracy | 2.46V | 2.5V | 2.54V |
| gain-bandwidth product | - | 1MHz | - | |
| Gate Drive | Peak pull/sink current | - | 800mA | - |
| Rise time (1nF load) | 60ns | - | 110ns | |
| Temperature Adaptability | UVLO threshold (-45~125 ℃) | ±3% | - | ±5% |
4. typical application scenarios
1. LCD TV/monitor power supply:Ensure backlight drive voltage stability with its ± 1.5% reference accuracy
2. Server redundant power supply:Dynamic OVP function effectively suppresses hot-swap voltage surge
3.LED high-end driverCrM mode natural matching LED dimming requirements, with ZCD detection to achieve no stroboscopic
Design attention: CS sampling resistor should be close to the chip (<5mm) during layout, COMP pin compensation network adopts RC series structure (recommended value: R = 10kΩ C = 10nF), and bandwidth should be controlled below 20Hz to optimize PF value.
5. packaging and reliability
ProvideSOP-8(4.8 × 3.8mm) andDIP-8(9.4 x 6.35mm) Dual options, support -65°C to 150°C storage temperature. Through 300 ℃(10s) reflow soldering certification, in line with industrial equipment reliability requirements.
Conclusion
Through the cooperation of THD optimization architecture and intelligent protection mechanism, the CXSU63307 solves the balance problem of harmonic distortion and system reliability of small and medium power supply. Its 3mA ultra-low operating current feature provides chip-level support for the next generation of energy-saving equipment in line with DoE VI-level energy efficiency, helping power supply design to break through the 90% + energy efficiency bottleneck.
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