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CXMC33127: High-performance 8-bit RISC MCU chip comprehensive analysis-integrated dual ADC, LCD driver and temperature sensor

CXMC33127 is a high-performance microcontroller based on the 8-bit RISC instruction set. It adopts an advanced low-power design and operates from 2.5V to 3.6V. High-speed (4.9MHz) and low-speed (32kHz)RC oscillators are integrated inside the chip, supporting multiple operating modes (normal, sleep, idle mode), with excellent energy efficiency performance. Its memory resources include 8K × 16 bits of OTP program memory, 256 bytes of SRAM and 256 bytes of EEPROM, which are suitable for application scenarios where non-volatile data needs to be read and written frequently.

CXMC33127: High-performance 8-bit RISC MCU chip comprehensive analysis-integrated dual ADC, LCD driver and temperature sensor
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Product introduction

In the context of the rapid development of intelligent devices and embedded systems, microcontroller (MCU) as the core control unit, its performance, integration and power consumption directly affect the competitiveness of the entire system. CXMC33127 is a high-performance microcontroller based on 8-bit RISC architecture, which integrates a variety of peripheral modules, including high-precision ADC, temperature sensor, LCD driver and PWM output. It is suitable for industrial control, smart home, medical equipment, consumer electronics and other fields. This article will analyze the architecture, functional characteristics, electrical parameters and application design of the CXMC33127 in depth, and provide a comprehensive technical reference for engineers.PqY嘉泰姆


1. Product Overview

CXMC33127 is a high-performance microcontroller based on the 8-bit RISC instruction set. It adopts an advanced low-power design and operates from 2.5V to 3.6V. High-speed (4.9MHz) and low-speed (32kHz)RC oscillators are integrated inside the chip, supporting multiple operating modes (normal, sleep, idle mode), with excellent energy efficiency performance. Its memory resources include 8K × 16 bits of OTP program memory, 256 bytes of SRAM and 256 bytes of EEPROM, which are suitable for application scenarios where non-volatile data needs to be read and written frequently.PqY嘉泰姆

The chip is an 8-bit RISC MCUPqY嘉泰姆
Key features:PqY嘉泰姆
Working voltage: 2.5V ~ 3.6VPqY嘉泰姆
Internal integrated high and low speed oscillatorPqY嘉泰姆
Low speed -32KHzPqY嘉泰姆
High Speed -4.9MHzPqY嘉泰姆
Multiple working modes: normal mode, sleep mode, idle modePqY嘉泰姆
Sleep Mode, Idle Mode 0, Idle Mode 1, and Wakeup to reduce power consumptionPqY嘉泰姆
All instructions can be completed in one or two instruction cyclesPqY嘉泰姆
OTP:8K * 16bit spacePqY嘉泰姆
SRAM:256 bytePqY嘉泰姆
EEPROM: Built-in EEPROM, EEPROM inside the chip is packaged with PORT port, EEPROM size is 256PqY嘉泰姆
bytePqY嘉泰姆
Primary Peripherals:PqY嘉泰姆
-- 1 channel 8-bit successive approximation ADCPqY嘉泰姆
-- 2-channel 24-bit SIGMA-DELTA ADCPqY嘉泰姆
-- Temperature sensorPqY嘉泰姆
-- 18x 4 LCD driverPqY嘉泰姆
OtherPqY嘉泰姆
One 8-bit programmable timer/counterPqY嘉泰姆
A time base function for generating a fixed time interrupt signalPqY嘉泰姆
5 Interrupt SourcesPqY嘉泰姆
Two 8-Bit Pulse Width Modulation (PWM) OutputsPqY嘉泰姆
11 bidirectional I/O portsPqY嘉泰姆
External interrupt input multiplexed with I/O portPqY嘉泰姆
Package form: SSOP48
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2. Core Architecture and Memory Organization

The CXMC33127 uses the classic Harvard architecture, program memory and data memory independent addressing, support single-cycle instruction execution. Its 13-bit program counter can address 8K × 16-bit program space, the interrupt vector is located at 0004H ~ 0018H, and the reset vector is 0000H. The data memory is divided into special function registers (SFR) and general purpose registers (GPR), supporting direct and indirect addressing modes with high flexibility. The built-in EEPROM is accessible via the I²C interface and is suitable for storing data such as calibration parameters, user configuration, etc.PqY嘉泰姆

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3. rich peripheral resources

3.1 Dual ADC ModulePqY嘉泰姆

3.1.1)8-bit successive approximation ADC(SRA-ADC) with a conversion period of 32 machine cycles, suitable for fast sampling scenarios.PqY嘉泰姆

3.1.2)24-bit & Sigma;-& Delta; ADC supports programmable gain (PGA = 2/128), output rate can be selected from 10Hz to 80Hz, differential input range ± 0.645mV(Gain = 128), suitable for high-precision measurement such as weighing, temperature detection, etc.PqY嘉泰姆

3.2 temperature sensor: Built-in temperature sensor, read the conversion value through a 24-bit ADC, the typical sensitivity is 740LSB/℃, and the temperature value can be directly output without an external sensor.PqY嘉泰姆

3.3 LCD Driver: Support 18 × 4 segment LCD display, configurable as 1/2 or 1/3 bias, 2~4 common terminals, built-in display memory and bias circuit, suitable for instrument panel,PqY嘉泰姆
Display panel and other applications.
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3.4 PWM output: Provide two 8-bit PWM, support output inversion and independent enable, can be used for motor control, LED dimming and other scenarios.PqY嘉泰姆

3.5 timer counterPqY嘉泰姆

3.5.1)Timer0 is an 8-bit programmable timer that supports prescaling and multiple clock source selections.PqY嘉泰姆

3.5.2)Timer1 is a fixed period counter used to generate time base interrupts.PqY嘉泰姆

3.6 interrupt system: Supports 5 interrupt sources, including external interrupt, Timer0/1 overflow interrupt, dual ADC conversion completion interrupt, and configurable priority.PqY嘉泰姆


4. Power Management and Low Power Features

CXMC33127 supports four operating modes, power consumption control is extremely flexible:PqY嘉泰姆

4.1 Normal Mode: All modules running, typical current 2.5mA(ADC on).PqY嘉泰姆

4.2 Idle Mode 0: The CPU stops, the system clock is turned off, the peripherals can still run, and the current is about 85 μA.PqY嘉泰姆

4.3 Idle Mode 1: CPU stops, system clock holds, current between normal and idle mode 0.PqY嘉泰姆

4.4 sleep mode: Only the low-speed oscillator and WDT operate, and the current is as low as 0.2 μA.PqY嘉泰姆

The watchdog timer (WDT) supports an adjustable overflow time of 8ms ~ 1s, which can wake up the system in sleep mode and enhance system reliability.PqY嘉泰姆


5. electrical characteristics and encapsulation

5.1 operating voltage:2.5V~3.6VPqY嘉泰姆

5.2 I/O levelCompatible with 1.8V ~ 3.6VPqY嘉泰姆

5.3 ESD protection: HBM mode up to 4000VPqY嘉泰姆

5.4 package formSSOP48, compact size, suitable for high density PCB layoutPqY嘉泰姆

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5.5 temperature range:-25 ℃ ~ 75 ℃ (industrial grade)PqY嘉泰姆
5.6 electrical characteristics
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5.6.1) Limit parametersPqY嘉泰姆
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5.6.2) Electrical characteristicsPqY嘉泰姆
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5.6.3)MCU electrical parametersPqY嘉泰姆
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5.6.4)LCD Driver Electrical ParametersPqY嘉泰姆
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6. Application Areas

CXMC33127 high integration and low power consumption make it widely used in:PqY嘉泰姆

6.1 smart home: touch panel, temperature and humidity controllerPqY嘉泰姆

6.2 industrial control: sensor signal processing, motor drivePqY嘉泰姆

6.3 Medical Equipment: Portable Monitoring InstrumentsPqY嘉泰姆

6.4 consumer electronics: electronic scales, smart watches, LCD display devicesPqY嘉泰姆


7. Development Support and Instruction Set

The chip provides 61 streamlined instructions, covering arithmetic, logic, bit operations, jumps, and other functions, supporting single-cycle execution. Developers can debug and download programs through the online burning interface (ICPSDA/ICPSCL). The built-in EEPROM can be read and written through the I²C interface to facilitate the storage of system parameters.PqY嘉泰姆

7.1. Memory structure.PqY嘉泰姆
The microcontroller consists of two memory modules: program memory and data memory. Each module has its ownPqY嘉泰姆
In the same cycle, two memory modules can be accessed at the same time.PqY嘉泰姆
7.1.1) Program memoryPqY嘉泰姆
The program memory is used to store the user code, that is, the storage program. The microcontroller has a 13-bit wide program counter, the mostPqY嘉泰姆
Large addressable 8k x 16 program storage space. The microcontroller has 8K x 16 program memory.
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Some addresses in program memory are reserved for special purposes such as resets and interrupts. 0000H is reserved for single chipPqY嘉泰姆
The program start address after the machine is reset. When the chip is initialized or reset occurs, the program will jump to this address and start.PqY嘉泰姆
Execution. 0004H ~ 0018H are interrupt vectors used to execute interrupt service routines. IDFFH to IFFFH are not available for the encryption area.PqY嘉泰姆
7.2 data memoryPqY嘉泰姆
       7.2.1 Data storage structurePqY嘉泰姆
The data memory consists of special function registers (SFRs) and general purpose registers (GPRs). Operation of SFR Control UnitPqY嘉泰姆
These registers have specific addresses and are closely related to the correct operation of the microcontroller. Most special function registers are available.PqY嘉泰姆
Read and write directly under program control, while some are protected from the user. GPR is the data storage andPqY嘉泰姆
An overwritten general-purpose area where all addresses can be read and written under program control.PqY嘉泰姆
The starting address of the data memory of the microcontroller is "000H", and the address range is 000H ~ 1FFH.
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      7.2.2 Special Function Register DescriptionPqY嘉泰姆
Most of the special function registers are described in detail in the related functions, but several registers are described separately in this section.PqY嘉泰姆
indirect addressing register-INDF0,INDF1PqY嘉泰姆
The addresses of the indirect addressing registers INDF0 and INDF1 are located in the data store, but they do not have actual physicalPqY嘉泰姆
Address. Indirect addressing is the use of indirect addressing registers and indirect addressing pointers to operate on data instead of defining realPqY嘉泰姆
Direct memory addressing method for inter-memory addresses. Any movement on the indirect address registers (INDF0 and INDF1)PqY嘉泰姆
The corresponding read/write operation will be generated for the memory address specified by the indirect addressing pointer (INDP0 and INDP1). ItPqY嘉泰姆
They always appear in pairs, INDF0 and INDP0 can access Bank 0, while INDF1 and INDP1 can access allPqY嘉泰姆
Bank (this microcontroller only Bank0).PqY嘉泰姆
Indirect Addressing Pointer-INDP0,INDP1PqY嘉泰姆
This series of microcontrollers provides two indirect addressing pointers, INDP0 and INDP1. Since these pointers are in the data memoryPqY嘉泰姆
The intermediate energy is typically operated like an ordinary register, thus providing an efficient method of addressing and data tracking. When the indirectPqY嘉泰姆
Addressing registers for any operation, the microcontroller points to the actual address is the address specified by the indirect addressing pointer.PqY嘉泰姆
INDP0,INDF0 are used to access Bank 0, while INDP1 and INDF1 can access all Banks through the RBS register. BetweenPqY嘉泰姆
The next address only accesses the general register, that is, the highest bit of the 9-bit address defaults to high.PqY嘉泰姆
Status Register-STATUSPqY嘉泰姆
The 8-bit register includes zero flag bit (Z), carry flag bit (C), auxiliary carry flag bit (AC), overflow flag bitPqY嘉泰姆
(OV), pause flag bit (PDF), and watchdog overflow flag bit (TO). These flag bits simultaneously record the number of states of the microcontroller.PqY嘉泰姆
According to and arithmetic/logical operations.PqY嘉泰姆
C: When the result of the addition operation produces a carry, or the result of the subtraction operation does not produce a borrow, then C is set, otherwisePqY嘉泰姆
C is cleared, and C is also affected by the shift instruction with carry.PqY嘉泰姆
AC: When the result of the low nibble addition operation produces a carry, or the result of the low nibble subtraction operation does not produce a borrow,PqY嘉泰姆
AC is set, otherwise AC is cleared.PqY嘉泰姆
Z: Z is set when the result of the arithmetic or logical operation is zero, otherwise Z is cleared.PqY嘉泰姆
OV: OV is set when the carry state XOR result of the upper two bits of the operation result is 1, otherwise OV is cleared.PqY嘉泰姆
PDF: System power-up or execution of the "CLRWDT" command will clear the PDF, while execution of the "STOP" command will set the PDF.PqY嘉泰姆
TO: TO will be cleared when the system is powered on or "CLRWDT" or "STOP" instructions are executed, and TO will be set when WDT overflows.PqY嘉泰姆
In addition, the status register will not be automatically pushed onto the stack when entering an interrupt program or executing a subroutine call.PqY嘉泰姆
Save. If the contents of the status register are important and the interrupt subroutine changes the contents of the status register, you need to keepPqY嘉泰姆
Save the backup for recovery.PqY嘉泰姆
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Bit 7~6 is not used, read as "0"PqY嘉泰姆
Bit 5 TO: Watchdog Overflow Flag BitPqY嘉泰姆
0: System power up or execute "CLRWDT" or "STOP" commandPqY嘉泰姆
1:WDT overflowPqY嘉泰姆
Bit 4 PDF: Pause Flag BitPqY嘉泰姆
0: System power up or execute "CLRWDT" commandPqY嘉泰姆
1: Executing the "STOP" instruction will set the PDF bit.PqY嘉泰姆
Bit 3 OV: overflow flag bitPqY嘉泰姆
0: when no overflow occursPqY嘉泰姆
1: When the XOR result of the carry state of the upper two digits of the operation result is 1PqY嘉泰姆
Bit 2 Z: zero flag bitPqY嘉泰姆
0: The result of an arithmetic or logical operation is not zeroPqY嘉泰姆
1: The result of an arithmetic or logical operation is zeroPqY嘉泰姆
Bit 1 AC: auxiliary carry flag bitPqY嘉泰姆
0: when there is no auxiliary carryPqY嘉泰姆
1: When the addition of the low byte causes a carry or subtraction does not cause a borrowPqY嘉泰姆
Bit 0 C: carry flag bit (opposite polarity when borrowing)PqY嘉泰姆
0: when there is no carryPqY嘉泰姆
1: When addition causes carry or subtraction does not cause borrowing, the shift instruction will also affect the C flag bit C.PqY嘉泰姆
It is also affected by the cyclic shift instruction.PqY嘉泰姆
7.3 EEPROM data memoryPqY嘉泰姆
A feature of the microcontroller is the built-in EEPROM data memory. “Electrically ErasablePqY嘉泰姆
Programmable Read Only Memory "is an electrically erasable programmable read-only memory, due to its non-volatile storage junction.PqY嘉泰姆
The data in the memory is still intact even if the power is lost. This memory area expands the ROM spacePqY嘉泰姆
Many new application opportunities have been added for designers. EEPROM can be used to store product numbers, calibration values, user-specificPqY嘉泰姆
data, system configuration parameters, or other product information.PqY嘉泰姆
The EEPROM data memory is readable and writable during normal operation over the entire VDD range. The memory andPqY嘉泰姆
Register is not directly mapped to file space, but accessed in I2C mode through port (see 11.1 for specific port connectionPqY嘉泰姆
port overview).PqY嘉泰姆
The EEPROM data memory can be read and written in bytes. A one-byte write operation will automatically erase and write the new valuePqY嘉泰姆
(I. e. erase before write). An EEPROM is a memory having a high erase/write cycle. The time of writing is timed by the chipPqY嘉泰姆
It varies with voltage, temperature and device.PqY嘉泰姆
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8. Summary

CXMC33127 is an excellent choice in the 8-bit MCU market with its rich integrated peripherals, low power design and flexible application configuration. Whether it is an industrial scenario that requires high-precision measurement or a portable device that is sensitive to power consumption, the chip can provide a reliable solution. Combined with its complete interrupt system, multiple communication interfaces and powerful instruction set, CXMC33127 can help developers quickly realize productization and improve system performance and competitiveness.PqY嘉泰姆

If you need further technical information, code examples or application circuit diagrams, we can provide you with more detailed support.PqY嘉泰姆


IX. Related ProductsPqY嘉泰姆

Model Characteristics SRAM OTP space ADC IO control port Timer Interrupt Source PWM Encapsulation form Remarks
CXMC33127 OTP MCU 256byte 8k*16bit 24bit two channels/8bit * 1 8 1 5 2 SSOP48 LCD with 18*4
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CXMC33129 OTP MCU 256byte 8k*16bit 24bit two channels/8bit * 1 10/13 1 5 2 SOP16/SOP20  
Model Characteristics SRAM OTP space ADC IO control port Timer Interrupt Source PWM Encapsulation form  
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