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首页 > Products > MCU Memory ADC Clock  > EEPROM Memory > EEPROM Memory >DDR Termination Regulator DDR I II Termination Regulator CXEP3476/CXEP3477 CXEP3478/CXEP347Bspecifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides
DDR Termination Regulator DDR I II Termination Regulator CXEP3476/CXEP3477 CXEP3478/CXEP347Bspecifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides

The CXEP3476 CXEP3477 CXEP3478 CXEP3478B is a linear regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients.

DDR Termination Regulator DDR I II Termination Regulator CXEP3476/CXEP3477 CXEP3478/CXEP347Bspecifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides
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1.产品概述       2.产品特点     LdI嘉泰姆

3.应用范围       4.技术规格书下载(PDF文档)LdI嘉泰姆

5.产品封装       6.电路原理图  LdI嘉泰姆

7.相关产品LdI嘉泰姆

   产品概述 返回TOPLdI嘉泰姆


The CXEP3476 CXEP3477 CXEP3478 CXEP3478B is a linear regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. With an independent VSENSE pin, the CXEP3476 CXEP3477 CXEP3478 CXEP3478B can provide superior load regulation. The CXEP3476 CXEP3477 CXEP3478 CXEP3478B provides a VREF output as the reference for the applications of the chipset and DIMMs.LdI嘉泰姆
The 
CXEP3476 CXEP3477 CXEP3478 CXEP3478Bcan easily provide the accurate VTT and VREF voltages without external resistors that PCB areas can be reduced. The quiescent current is as low as 280μA @ 2.5V. So the power consumption can meet the low power consumption applications.

   产品特点 返回TOPLdI嘉泰姆


„ Operation Supply Voltage: 1.6V to 5.5V LdI嘉泰姆

„ Low Supply Current: 280μA @ 2.5V LdI嘉泰姆

„ Low Output Offset LdI嘉泰姆

„ Source and Sink Current LdI嘉泰姆

„ Low External Component Count LdI嘉泰姆

„ No Inductor Required LdI嘉泰姆

„ No external Resistors Required LdI嘉泰姆

„ Thermal Shutdown Protection LdI嘉泰姆

„ SOP-8 with Power-Pad packageLdI嘉泰姆

   应用范围 返回TOPLdI嘉泰姆


„ DDR-SDRAM Termination Voltage LdI嘉泰姆

„ DDR-I / DDR-II Termination Voltage LdI嘉泰姆

„ SSTL-2 LdI嘉泰姆

„ SSTL-3LdI嘉泰姆

   技术规格书(产品PDF) 返回TOP LdI嘉泰姆


     需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持!LdI嘉泰姆

 QQ截图20160419174301.jpgLdI嘉泰姆

产品封装图 返回TOPLdI嘉泰姆


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电路原理图 返回TOPLdI嘉泰姆

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750LdI嘉泰姆

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1.8LdI嘉泰姆

1.8LdI嘉泰姆

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700LdI嘉泰姆

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2LdI嘉泰姆

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1300LdI嘉泰姆

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1.5LdI嘉泰姆

0.03LdI嘉泰姆

280LdI嘉泰姆

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3.6LdI嘉泰姆

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4~3LdI嘉泰姆

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800LdI嘉泰姆

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900LdI嘉泰姆

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